Commit 543aa259 authored by Jiansong Chen's avatar Jiansong Chen Committed by Alex Deucher
Browse files

drm/amdgpu/soc15: add support for navy_flounder 



Add soc support.

Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarTao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d463d8c9

drivers/gpu/drm/amd/amdgpu/nv.c

+7 −0
Original line number Diff line number Diff line
@@ -754,6 +754,12 @@ static int nv_common_early_init(void *handle) 
		}

		adev->external_rev_id = adev->rev_id + 0x28;

		break;

	case CHIP_NAVY_FLOUNDER:

		adev->cg_flags = 0;

		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x32;

		break;



	default:

		/* FIXME: not supported yet */

		return -EINVAL;
@@ -980,6 +986,7 @@ static int nv_common_set_clockgating_state(void *handle, 
	case CHIP_NAVI14:

	case CHIP_NAVI12:

	case CHIP_SIENNA_CICHLID:

	case CHIP_NAVY_FLOUNDER:

		adev->nbio.funcs->update_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		adev->nbio.funcs->update_medium_grain_light_sleep(adev,