Commit 5417197d authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'wwan-t7xx-fw-flashing-and-coredump-support'



M Chetan Kumar says:

====================
net: wwan: t7xx: fw flashing & coredump support

This patch series brings-in the support for FM350 wwan device firmware
flashing & coredump collection using devlink interface.

Below is the high level description of individual patches.
Refer to individual patch commit message for details.

PATCH1:  Enables AP CLDMA communication for firmware flashing &
coredump collection.

PATCH2: Enables the infrastructure & queue configuration required
for early ports enumeration.

PATCH3: Implements device reset and rescan logic required to enter
or exit fastboot mode.

PATCH4: Implements devlink interface & uses the fastboot protocol for
fw flashing and coredump collection.

PATCH5: t7xx devlink commands documentation.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 0630f64d b0bc1709
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+1 −0
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@@ -67,3 +67,4 @@ parameters, info versions, and other features it supports.
   prestera
   iosm
   octeontx2
   t7xx
+145 −0
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.. SPDX-License-Identifier: GPL-2.0

====================
t7xx devlink support
====================

This document describes the devlink features implemented by the ``t7xx``
device driver.

Flash Update
============

The ``t7xx`` driver implements the flash update using the ``devlink-flash``
interface.

The driver uses DEVLINK_SUPPORT_FLASH_UPDATE_COMPONENT to identify the type of
firmware image that need to be programmed upon the request by user space application.

The supported list of firmware image types is described below.

.. list-table:: Firmware Image types
    :widths: 15 85

    * - Name
      - Description
    * - ``preloader``
      - The first-stage bootloader image
    * - ``loader_ext1``
      - Preloader extension image
    * - ``tee1``
      - ARM trusted firmware and TEE (Trusted Execution Environment) image
    * - ``lk``
      - The second-stage bootloader image
    * - ``spmfw``
      - MediaTek in-house ASIC for power management image
    * - ``sspm_1``
      - MediaTek in-house ASIC for power management under secure world image
    * - ``mcupm_1``
      - MediaTek in-house ASIC for cpu power management image
    * - ``dpm_1``
      - MediaTek in-house ASIC for dram power management image
    * - ``boot``
      - The kernel and dtb image
    * - ``rootfs``
      - Root filesystem image
    * - ``md1img``
      - Modem image
    * - ``md1dsp``
      - Modem DSP image
    * - ``mcf1``
      - Modem OTA image (Modem Configuration Framework) for operators
    * - ``mcf2``
      - Modem OTA image (Modem Configuration Framework) for OEM vendors
    * - ``mcf3``
      - Modem OTA image (other usage) for OEM configurations

``t7xx`` driver uses fastboot protocol for fw flashing. In the fw flashing
procedure, fastboot command's & response's are exchanged between driver
and wwan device.

The wwan device is put into fastboot mode via devlink reload command, by
passing "driver_reinit" action.

$ devlink dev reload pci/0000:$bdf action driver_reinit

Upon completion of fw flashing or coredump collection the wwan device is
reset to normal mode using devlink reload command, by passing "fw_activate"
action.

$ devlink dev reload pci/0000:$bdf action fw_activate

Flash Commands:
===============

$ devlink dev flash pci/0000:$bdf file preloader_k6880v1_mdot2_datacard.bin component "preloader"

$ devlink dev flash pci/0000:$bdf file loader_ext-verified.img component "loader_ext1"

$ devlink dev flash pci/0000:$bdf file tee-verified.img component "tee1"

$ devlink dev flash pci/0000:$bdf file lk-verified.img component "lk"

$ devlink dev flash pci/0000:$bdf file spmfw-verified.img component "spmfw"

$ devlink dev flash pci/0000:$bdf file sspm-verified.img component "sspm_1"

$ devlink dev flash pci/0000:$bdf file mcupm-verified.img component "mcupm_1"

$ devlink dev flash pci/0000:$bdf file dpm-verified.img component "dpm_1"

$ devlink dev flash pci/0000:$bdf file boot-verified.img component "boot"

$ devlink dev flash pci/0000:$bdf file root.squashfs component "rootfs"

$ devlink dev flash pci/0000:$bdf file modem-verified.img component "md1img"

$ devlink dev flash pci/0000:$bdf file dsp-verified.bin component "md1dsp"

$ devlink dev flash pci/0000:$bdf file OP_OTA.img component "mcf1"

$ devlink dev flash pci/0000:$bdf file OEM_OTA.img component "mcf2"

$ devlink dev flash pci/0000:$bdf file DEV_OTA.img component "mcf3"

Note: component "value" represents the partition type to be programmed.

Regions
=======

The ``t7xx`` driver supports core dump collection when device encounters
an exception. When wwan device encounters an exception, a snapshot of device
internal data will be taken by the driver using fastboot commands.

Following regions are accessed for device internal data.

.. list-table:: Regions implemented
    :widths: 15 85

    * - Name
      - Description
    * - ``mr_dump``
      - The detailed modem components log are captured in this region
    * - ``lk_dump``
      - This region dumps the current snapshot of lk


Region commands
===============

$ devlink region show


$ devlink region new mr_dump

$ devlink region read mr_dump snapshot 0 address 0 length $len

$ devlink region del mr_dump snapshot 0

$ devlink region new lk_dump

$ devlink region read lk_dump snapshot 0 address 0 length $len

$ devlink region del lk_dump snapshot 0

Note: $len is actual len to be dumped.
+1 −0
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@@ -108,6 +108,7 @@ config IOSM
config MTK_T7XX
	tristate "MediaTek PCIe 5G WWAN modem T7xx device"
	depends on PCI
	select NET_DEVLINK
	help
	  Enables MediaTek PCIe based 5G WWAN modem (T7xx series) device.
	  Adapts WWAN framework and provides network interface like wwan0
+4 −1
Original line number Diff line number Diff line
@@ -17,4 +17,7 @@ mtk_t7xx-y:= t7xx_pci.o \
		t7xx_hif_dpmaif_tx.o \
		t7xx_hif_dpmaif_rx.o  \
		t7xx_dpmaif.o \
		t7xx_netdev.o
		t7xx_netdev.o \
		t7xx_pci_rescan.o \
		t7xx_uevent.o \
		t7xx_port_devlink.o
+41 −14
Original line number Diff line number Diff line
@@ -57,8 +57,6 @@
#define CHECK_Q_STOP_TIMEOUT_US		1000000
#define CHECK_Q_STOP_STEP_US		10000

#define CLDMA_JUMBO_BUFF_SZ		(63 * 1024 + sizeof(struct ccci_header))

static void md_cd_queue_struct_reset(struct cldma_queue *queue, struct cldma_ctrl *md_ctrl,
				     enum mtk_txrx tx_rx, unsigned int index)
{
@@ -993,6 +991,34 @@ int t7xx_cldma_send_skb(struct cldma_ctrl *md_ctrl, int qno, struct sk_buff *skb
	return ret;
}

static void t7xx_cldma_adjust_config(struct cldma_ctrl *md_ctrl, enum cldma_cfg cfg_id)
{
	int qno;

	for (qno = 0; qno < CLDMA_RXQ_NUM; qno++) {
		md_ctrl->rx_ring[qno].pkt_size = CLDMA_SHARED_Q_BUFF_SZ;
		md_ctrl->rxq[qno].q_type = CLDMA_SHARED_Q;
	}

	md_ctrl->rx_ring[CLDMA_RXQ_NUM - 1].pkt_size = CLDMA_JUMBO_BUFF_SZ;

	for (qno = 0; qno < CLDMA_TXQ_NUM; qno++) {
		md_ctrl->tx_ring[qno].pkt_size = CLDMA_SHARED_Q_BUFF_SZ;
		md_ctrl->txq[qno].q_type = CLDMA_SHARED_Q;
	}

	if (cfg_id == CLDMA_DEDICATED_Q_CFG) {
		md_ctrl->rxq[DOWNLOAD_PORT_ID].q_type = CLDMA_DEDICATED_Q;
		md_ctrl->txq[DOWNLOAD_PORT_ID].q_type = CLDMA_DEDICATED_Q;
		md_ctrl->tx_ring[DOWNLOAD_PORT_ID].pkt_size = CLDMA_DEDICATED_Q_BUFF_SZ;
		md_ctrl->rx_ring[DOWNLOAD_PORT_ID].pkt_size = CLDMA_DEDICATED_Q_BUFF_SZ;
		md_ctrl->rxq[DUMP_PORT_ID].q_type = CLDMA_DEDICATED_Q;
		md_ctrl->txq[DUMP_PORT_ID].q_type = CLDMA_DEDICATED_Q;
		md_ctrl->tx_ring[DUMP_PORT_ID].pkt_size = CLDMA_DEDICATED_Q_BUFF_SZ;
		md_ctrl->rx_ring[DUMP_PORT_ID].pkt_size = CLDMA_DEDICATED_Q_BUFF_SZ;
	}
}

static int t7xx_cldma_late_init(struct cldma_ctrl *md_ctrl)
{
	char dma_pool_name[32];
@@ -1021,11 +1047,6 @@ static int t7xx_cldma_late_init(struct cldma_ctrl *md_ctrl)
	}

	for (j = 0; j < CLDMA_RXQ_NUM; j++) {
		md_ctrl->rx_ring[j].pkt_size = CLDMA_MTU;

		if (j == CLDMA_RXQ_NUM - 1)
			md_ctrl->rx_ring[j].pkt_size = CLDMA_JUMBO_BUFF_SZ;

		ret = t7xx_cldma_rx_ring_init(md_ctrl, &md_ctrl->rx_ring[j]);
		if (ret) {
			dev_err(md_ctrl->dev, "Control RX ring init fail\n");
@@ -1064,13 +1085,18 @@ static void t7xx_hw_info_init(struct cldma_ctrl *md_ctrl)
	struct t7xx_cldma_hw *hw_info = &md_ctrl->hw_info;
	u32 phy_ao_base, phy_pd_base;

	if (md_ctrl->hif_id != CLDMA_ID_MD)
		return;
	hw_info->hw_mode = MODE_BIT_64;

	if (md_ctrl->hif_id == CLDMA_ID_MD) {
		phy_ao_base = CLDMA1_AO_BASE;
		phy_pd_base = CLDMA1_PD_BASE;
		hw_info->phy_interrupt_id = CLDMA1_INT;
	hw_info->hw_mode = MODE_BIT_64;
	} else {
		phy_ao_base = CLDMA0_AO_BASE;
		phy_pd_base = CLDMA0_PD_BASE;
		hw_info->phy_interrupt_id = CLDMA0_INT;
	}

	hw_info->ap_ao_base = t7xx_pcie_addr_transfer(pbase->pcie_ext_reg_base,
						      pbase->pcie_dev_reg_trsl_addr, phy_ao_base);
	hw_info->ap_pdn_base = t7xx_pcie_addr_transfer(pbase->pcie_ext_reg_base,
@@ -1324,9 +1350,10 @@ int t7xx_cldma_init(struct cldma_ctrl *md_ctrl)
	return -ENOMEM;
}

void t7xx_cldma_switch_cfg(struct cldma_ctrl *md_ctrl)
void t7xx_cldma_switch_cfg(struct cldma_ctrl *md_ctrl, enum cldma_cfg cfg_id)
{
	t7xx_cldma_late_release(md_ctrl);
	t7xx_cldma_adjust_config(md_ctrl, cfg_id);
	t7xx_cldma_late_init(md_ctrl);
}

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