Commit 541132f0 authored by Maxim Kochetkov's avatar Maxim Kochetkov Committed by David S. Miller
Browse files

net: mscc: ocelot: convert SYS_PAUSE_CFG register access to regfield 



Seville has a different bitwise layout than Ocelot and Felix.

Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b3964807

drivers/net/dsa/ocelot/felix_vsc9959.c

+3 −0
Original line number Diff line number Diff line
@@ -515,6 +515,9 @@ static const struct reg_field vsc9959_regfields[REGFIELD_MAX] = { 
	[SYS_PORT_MODE_INCL_INJ_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 3, 4, 7, 4),

	[SYS_PORT_MODE_INCL_XTR_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 1, 2, 7, 4),

	[SYS_PORT_MODE_INCL_HDR_ERR] = REG_FIELD_ID(SYS_PORT_MODE, 0, 0, 7, 4),

	[SYS_PAUSE_CFG_PAUSE_START] = REG_FIELD_ID(SYS_PAUSE_CFG, 10, 18, 7, 4),

	[SYS_PAUSE_CFG_PAUSE_STOP] = REG_FIELD_ID(SYS_PAUSE_CFG, 1, 9, 7, 4),

	[SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 7, 4),

};



static const struct ocelot_stat_layout vsc9959_stats_layout[] = {

drivers/net/ethernet/mscc/ocelot.c

+6 −8
Original line number Diff line number Diff line
@@ -1276,10 +1276,10 @@ void ocelot_port_set_maxlen(struct ocelot *ocelot, int port, size_t sdu) 
	/* Set Pause watermark hysteresis */

	pause_start = 6 * maxlen / OCELOT_BUFFER_CELL_SZ;

	pause_stop = 4 * maxlen / OCELOT_BUFFER_CELL_SZ;

	ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_START(pause_start),

		       SYS_PAUSE_CFG_PAUSE_START_M, SYS_PAUSE_CFG, port);

	ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_STOP(pause_stop),

		       SYS_PAUSE_CFG_PAUSE_STOP_M, SYS_PAUSE_CFG, port);

	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_START,

			    pause_start);

	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_STOP,

			    pause_stop);



	/* Tail dropping watermark */

	atop_wm = (ocelot->shared_queue_sz - 9 * maxlen) /
@@ -1343,8 +1343,7 @@ void ocelot_init_port(struct ocelot *ocelot, int port) 
	ocelot_port_writel(ocelot_port, 0, DEV_MAC_FC_MAC_LOW_CFG);



	/* Enable transmission of pause frames */

	ocelot_rmw_rix(ocelot, SYS_PAUSE_CFG_PAUSE_ENA, SYS_PAUSE_CFG_PAUSE_ENA,

		       SYS_PAUSE_CFG, port);

	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);



	/* Drop frames with multicast source address */

	ocelot_rmw_gix(ocelot, ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
@@ -1403,8 +1402,7 @@ void ocelot_configure_cpu(struct ocelot *ocelot, int npi, 
				    injection);



		/* Disable transmission of pause frames */

		ocelot_rmw_rix(ocelot, 0, SYS_PAUSE_CFG_PAUSE_ENA,

			       SYS_PAUSE_CFG, npi);

		ocelot_fields_write(ocelot, npi, SYS_PAUSE_CFG_PAUSE_ENA, 0);

	}



	/* Enable CPU port module */

drivers/net/ethernet/mscc/ocelot_vsc7514.c

+3 −0
Original line number Diff line number Diff line
@@ -369,6 +369,9 @@ static const struct reg_field ocelot_regfields[REGFIELD_MAX] = { 
	[SYS_PORT_MODE_INCL_INJ_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 3, 4, 11, 4),

	[SYS_PORT_MODE_INCL_XTR_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 1, 2, 11, 4),

	[SYS_PORT_MODE_INCL_HDR_ERR] = REG_FIELD_ID(SYS_PORT_MODE, 0, 0, 11, 4),

	[SYS_PAUSE_CFG_PAUSE_START] = REG_FIELD_ID(SYS_PAUSE_CFG, 10, 18, 11, 4),

	[SYS_PAUSE_CFG_PAUSE_STOP] = REG_FIELD_ID(SYS_PAUSE_CFG, 1, 9, 11, 4),

	[SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 11, 4),

};



static const struct ocelot_stat_layout ocelot_stats_layout[] = {

include/soc/mscc/ocelot.h

+3 −0
Original line number Diff line number Diff line
@@ -511,6 +511,9 @@ enum ocelot_regfield { 
	GCB_SOFT_RST_SWC_RST,

	GCB_MIIM_MII_STATUS_PENDING,

	GCB_MIIM_MII_STATUS_BUSY,

	SYS_PAUSE_CFG_PAUSE_START,

	SYS_PAUSE_CFG_PAUSE_STOP,

	SYS_PAUSE_CFG_PAUSE_ENA,

	REGFIELD_MAX

};

include/soc/mscc/ocelot_sys.h

+0 −10
Original line number Diff line number Diff line
@@ -43,16 +43,6 @@ 
#define SYS_TIMESTAMP_OFFSET_TIMESTAMP_OFFSET(x)          ((x) & GENMASK(5, 0))

#define SYS_TIMESTAMP_OFFSET_TIMESTAMP_OFFSET_M           GENMASK(5, 0)



#define SYS_PAUSE_CFG_RSZ                                 0x4



#define SYS_PAUSE_CFG_PAUSE_START(x)                      (((x) << 10) & GENMASK(18, 10))

#define SYS_PAUSE_CFG_PAUSE_START_M                       GENMASK(18, 10)

#define SYS_PAUSE_CFG_PAUSE_START_X(x)                    (((x) & GENMASK(18, 10)) >> 10)

#define SYS_PAUSE_CFG_PAUSE_STOP(x)                       (((x) << 1) & GENMASK(9, 1))

#define SYS_PAUSE_CFG_PAUSE_STOP_M                        GENMASK(9, 1)

#define SYS_PAUSE_CFG_PAUSE_STOP_X(x)                     (((x) & GENMASK(9, 1)) >> 1)

#define SYS_PAUSE_CFG_PAUSE_ENA                           BIT(0)



#define SYS_PAUSE_TOT_CFG_PAUSE_TOT_START(x)              (((x) << 9) & GENMASK(17, 9))

#define SYS_PAUSE_TOT_CFG_PAUSE_TOT_START_M               GENMASK(17, 9)

#define SYS_PAUSE_TOT_CFG_PAUSE_TOT_START_X(x)            (((x) & GENMASK(17, 9)) >> 9)