Commit 53fa86e7 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

selftests/powerpc/ptrace: Convert to load/store doubles 



Some of the ptrace tests check the contents of floating pointer
registers. Currently these use float, which is always 4 bytes, but the
ptrace API supports saving/restoring 8 bytes per register, so switch to
using doubles to exercise the code more fully.

Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220627140239.2464900-8-mpe@ellerman.id.au
parent af9f3f31

tools/testing/selftests/powerpc/include/reg.h

+34 −34
Original line number Diff line number Diff line
@@ -127,44 +127,44 @@ 
		"li 30, %[" #_asm_symbol_name_immed "];" \

		"li 31, %[" #_asm_symbol_name_immed "];"



#define ASM_LOAD_FPR_SINGLE_PRECISION(_asm_symbol_name_addr) \

		"lfs 0, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 1, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 2, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 3, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 4, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 5, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 6, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 7, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 8, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 9, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 10, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 11, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 12, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 13, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 14, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 15, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 16, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 17, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 18, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 19, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 20, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 21, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 22, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 23, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 24, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 25, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 26, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 27, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 28, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 29, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 30, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfs 31, 0(%[" #_asm_symbol_name_addr "]);"

#define ASM_LOAD_FPR(_asm_symbol_name_addr) \

		"lfd 0, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 1, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 2, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 3, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 4, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 5, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 6, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 7, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 8, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 9, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 10, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 11, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 12, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 13, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 14, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 15, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 16, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 17, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 18, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 19, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 20, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 21, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 22, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 23, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 24, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 25, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 26, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 27, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 28, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 29, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 30, 0(%[" #_asm_symbol_name_addr "]);" \

		"lfd 31, 0(%[" #_asm_symbol_name_addr "]);"



#ifndef __ASSEMBLER__

void store_gpr(unsigned long *addr);

void load_gpr(unsigned long *addr);

void store_fpr_single_precision(float *addr);

void store_fpr(double *addr);

#endif /* end of __ASSEMBLER__ */



#endif /* _SELFTESTS_POWERPC_REG_H */

tools/testing/selftests/powerpc/lib/reg.S

+35 −35
Original line number Diff line number Diff line
@@ -53,42 +53,42 @@ FUNC_START(store_gpr) 
	blr

FUNC_END(store_gpr)



/* Single Precision Float - float buf[32] */

FUNC_START(store_fpr_single_precision)

	stfs 0, 0*4(3)

	stfs 1, 1*4(3)

	stfs 2, 2*4(3)

	stfs 3, 3*4(3)

	stfs 4, 4*4(3)

	stfs 5, 5*4(3)

	stfs 6, 6*4(3)

	stfs 7, 7*4(3)

	stfs 8, 8*4(3)

	stfs 9, 9*4(3)

	stfs 10, 10*4(3)

	stfs 11, 11*4(3)

	stfs 12, 12*4(3)

	stfs 13, 13*4(3)

	stfs 14, 14*4(3)

	stfs 15, 15*4(3)

	stfs 16, 16*4(3)

	stfs 17, 17*4(3)

	stfs 18, 18*4(3)

	stfs 19, 19*4(3)

	stfs 20, 20*4(3)

	stfs 21, 21*4(3)

	stfs 22, 22*4(3)

	stfs 23, 23*4(3)

	stfs 24, 24*4(3)

	stfs 25, 25*4(3)

	stfs 26, 26*4(3)

	stfs 27, 27*4(3)

	stfs 28, 28*4(3)

	stfs 29, 29*4(3)

	stfs 30, 30*4(3)

	stfs 31, 31*4(3)

/* Double Precision Float - double buf[32] */

FUNC_START(store_fpr)

	stfd  0,  0*8(3)

	stfd  1,  1*8(3)

	stfd  2,  2*8(3)

	stfd  3,  3*8(3)

	stfd  4,  4*8(3)

	stfd  5,  5*8(3)

	stfd  6,  6*8(3)

	stfd  7,  7*8(3)

	stfd  8,  8*8(3)

	stfd  9,  9*8(3)

	stfd 10, 10*8(3)

	stfd 11, 11*8(3)

	stfd 12, 12*8(3)

	stfd 13, 13*8(3)

	stfd 14, 14*8(3)

	stfd 15, 15*8(3)

	stfd 16, 16*8(3)

	stfd 17, 17*8(3)

	stfd 18, 18*8(3)

	stfd 19, 19*8(3)

	stfd 20, 20*8(3)

	stfd 21, 21*8(3)

	stfd 22, 22*8(3)

	stfd 23, 23*8(3)

	stfd 24, 24*8(3)

	stfd 25, 25*8(3)

	stfd 26, 26*8(3)

	stfd 27, 27*8(3)

	stfd 28, 28*8(3)

	stfd 29, 29*8(3)

	stfd 30, 30*8(3)

	stfd 31, 31*8(3)

	blr

FUNC_END(store_fpr_single_precision)

FUNC_END(store_fpr)



/* VMX/VSX registers - unsigned long buf[128] */

FUNC_START(loadvsx)

tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c

+8 −8
Original line number Diff line number Diff line
@@ -12,20 +12,20 @@ 
int shm_id;

int *cptr, *pptr;



float a = FPR_1;

float b = FPR_2;

float c = FPR_3;

double a = FPR_1;

double b = FPR_2;

double c = FPR_3;



void gpr(void)

{

	unsigned long gpr_buf[18];

	float fpr_buf[32];

	double fpr_buf[32];



	cptr = (int *)shmat(shm_id, NULL, 0);



	asm __volatile__(

		ASM_LOAD_GPR_IMMED(gpr_1)

		ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)

		ASM_LOAD_FPR(flt_1)

		:

		: [gpr_1]"i"(GPR_1), [flt_1] "b" (&a)

		: "memory", "r6", "r7", "r8", "r9", "r10",
@@ -41,12 +41,12 @@ void gpr(void) 


	shmdt((void *)cptr);

	store_gpr(gpr_buf);

	store_fpr_single_precision(fpr_buf);

	store_fpr(fpr_buf);



	if (validate_gpr(gpr_buf, GPR_3))

		exit(1);



	if (validate_fpr_float(fpr_buf, c))

	if (validate_fpr_double(fpr_buf, c))

		exit(1);



	exit(0);
@@ -55,7 +55,7 @@ void gpr(void) 
int trace_gpr(pid_t child)

{

	unsigned long gpr[18];

	unsigned long fpr[32];

	__u64 fpr[32];



	FAIL_IF(start_trace(child));

	FAIL_IF(show_gpr(child, gpr));

tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h

+7 −7
Original line number Diff line number Diff line
@@ -12,10 +12,10 @@ 
#define FPR_3	0.003

#define FPR_4	0.004



#define FPR_1_REP 0x3f50624de0000000

#define FPR_2_REP 0x3f60624de0000000

#define FPR_3_REP 0x3f689374c0000000

#define FPR_4_REP 0x3f70624de0000000

#define FPR_1_REP 0x3f50624dd2f1a9fcull

#define FPR_2_REP 0x3f60624dd2f1a9fcull

#define FPR_3_REP 0x3f689374bc6a7efaull

#define FPR_4_REP 0x3f70624dd2f1a9fcull



/* Buffer must have 18 elements */

int validate_gpr(unsigned long *gpr, unsigned long val)
@@ -36,13 +36,13 @@ int validate_gpr(unsigned long *gpr, unsigned long val) 
}



/* Buffer must have 32 elements */

int validate_fpr(unsigned long *fpr, unsigned long val)

int validate_fpr(__u64 *fpr, __u64 val)

{

	int i, found = 1;



	for (i = 0; i < 32; i++) {

		if (fpr[i] != val) {

			printf("FPR[%d]: %lx Expected: %lx\n", i, fpr[i], val);

			printf("FPR[%d]: %llx Expected: %llx\n", i, fpr[i], val);

			found = 0;

		}

	}
@@ -53,7 +53,7 @@ int validate_fpr(unsigned long *fpr, unsigned long val) 
}



/* Buffer must have 32 elements */

int validate_fpr_float(float *fpr, float val)

int validate_fpr_double(double *fpr, double val)

{

	int i, found = 1;

tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c

+9 −9
Original line number Diff line number Diff line
@@ -12,15 +12,15 @@ 
int shm_id;

unsigned long *cptr, *pptr;



float a = FPR_1;

float b = FPR_2;

float c = FPR_3;

double a = FPR_1;

double b = FPR_2;

double c = FPR_3;



void tm_gpr(void)

{

	unsigned long gpr_buf[18];

	unsigned long result, texasr;

	float fpr_buf[32];

	double fpr_buf[32];



	printf("Starting the child\n");

	cptr = (unsigned long *)shmat(shm_id, NULL, 0);
@@ -29,12 +29,12 @@ void tm_gpr(void) 
	cptr[1] = 0;

	asm __volatile__(

		ASM_LOAD_GPR_IMMED(gpr_1)

		ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)

		ASM_LOAD_FPR(flt_1)

		"1: ;"

		"tbegin.;"

		"beq 2f;"

		ASM_LOAD_GPR_IMMED(gpr_2)

		ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)

		ASM_LOAD_FPR(flt_2)

		"tsuspend.;"

		"li 7, 1;"

		"stw 7, 0(%[cptr1]);"
@@ -70,12 +70,12 @@ void tm_gpr(void) 


		shmdt((void *)cptr);

		store_gpr(gpr_buf);

		store_fpr_single_precision(fpr_buf);

		store_fpr(fpr_buf);



		if (validate_gpr(gpr_buf, GPR_3))

			exit(1);



		if (validate_fpr_float(fpr_buf, c))

		if (validate_fpr_double(fpr_buf, c))

			exit(1);



		exit(0);
@@ -87,7 +87,7 @@ void tm_gpr(void) 
int trace_tm_gpr(pid_t child)

{

	unsigned long gpr[18];

	unsigned long fpr[32];

	__u64 fpr[32];



	FAIL_IF(start_trace(child));

	FAIL_IF(show_gpr(child, gpr));