Commit 53c58c08 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r9a07g044: Fix OSTM1 module clock name



Fix a typo in the name of the "ostm1_pclk" clock.
This change has no run-time impact.

Fixes: 16145013 ("clk: renesas: r9a07g044: Add OSTM clock and reset entries")
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e0eff1f57378ec29d0d3f1a7bdd7e380583f736b.1651494871.git.geert+renesas@glider.be
parent 84c9829d
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+1 −1
Original line number Diff line number Diff line
@@ -212,7 +212,7 @@ static const struct {
					0x52c, 1),
		DEF_MOD("ostm0_pclk",	R9A07G044_OSTM0_PCLK, R9A07G044_CLK_P0,
					0x534, 0),
		DEF_MOD("ostm1_clk",	R9A07G044_OSTM1_PCLK, R9A07G044_CLK_P0,
		DEF_MOD("ostm1_pclk",	R9A07G044_OSTM1_PCLK, R9A07G044_CLK_P0,
					0x534, 1),
		DEF_MOD("ostm2_pclk",	R9A07G044_OSTM2_PCLK, R9A07G044_CLK_P0,
					0x534, 2),