Commit 53c1c250 authored by Heiko Carstens's avatar Heiko Carstens Committed by Vasily Gorbik
Browse files

s390/pgtable: use register pair instead of register asm 



Signed-off-by: default avatarHeiko Carstens <hca@linux.ibm.com>
Signed-off-by: default avatarVasily Gorbik <gor@linux.ibm.com>
parent 9e250926

arch/s390/include/asm/pgtable.h

+13 −17
Original line number Diff line number Diff line
@@ -558,27 +558,25 @@ static inline int mm_uses_skeys(struct mm_struct *mm) 


static inline void csp(unsigned int *ptr, unsigned int old, unsigned int new)

{

	register unsigned long reg2 asm("2") = old;

	register unsigned long reg3 asm("3") = new;

	union register_pair r1 = { .even = old, .odd = new, };

	unsigned long address = (unsigned long)ptr | 1;



	asm volatile(

		"	csp	%0,%3"

		: "+d" (reg2), "+m" (*ptr)

		: "d" (reg3), "d" (address)

		"	csp	%[r1],%[address]"

		: [r1] "+&d" (r1.pair), "+m" (*ptr)

		: [address] "d" (address)

		: "cc");

}



static inline void cspg(unsigned long *ptr, unsigned long old, unsigned long new)

{

	register unsigned long reg2 asm("2") = old;

	register unsigned long reg3 asm("3") = new;

	union register_pair r1 = { .even = old, .odd = new, };

	unsigned long address = (unsigned long)ptr | 1;



	asm volatile(

		"	.insn	rre,0xb98a0000,%0,%3"

		: "+d" (reg2), "+m" (*ptr)

		: "d" (reg3), "d" (address)

		"	.insn	rre,0xb98a0000,%[r1],%[address]"

		: [r1] "+&d" (r1.pair), "+m" (*ptr)

		: [address] "d" (address)

		: "cc");

}
@@ -592,14 +590,12 @@ static inline void crdte(unsigned long old, unsigned long new, 
			 unsigned long table, unsigned long dtt,

			 unsigned long address, unsigned long asce)

{

	register unsigned long reg2 asm("2") = old;

	register unsigned long reg3 asm("3") = new;

	register unsigned long reg4 asm("4") = table | dtt;

	register unsigned long reg5 asm("5") = address;

	union register_pair r1 = { .even = old, .odd = new, };

	union register_pair r2 = { .even = table | dtt, .odd = address, };



	asm volatile(".insn rrf,0xb98f0000,%0,%2,%4,0"

		     : "+d" (reg2)

		     : "d" (reg3), "d" (reg4), "d" (reg5), "a" (asce)

	asm volatile(".insn rrf,0xb98f0000,%[r1],%[r2],%[asce],0"

		     : [r1] "+&d" (r1.pair)

		     : [r2] "d" (r2.pair), [asce] "a" (asce)

		     : "memory", "cc");

}