Commit 531f27ad authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v6.3-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fix from Linus Walleij:
 "This is just a revert of the AMD fix, because the fix broke some
  laptops. We are working on a proper solution"

* tag 'pinctrl-v6.3-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  Revert "pinctrl: amd: Disable and mask interrupts on resume"
parents f1be7b6c 534e4658

drivers/pinctrl/pinctrl-amd.c

+16 −20
Original line number Diff line number Diff line
@@ -872,34 +872,32 @@ static const struct pinconf_ops amd_pinconf_ops = { 
	.pin_config_group_set = amd_pinconf_group_set,

};



static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)

static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

{

	const struct pin_desc *pd;

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	unsigned long flags;

	u32 pin_reg, mask;

	int i;



	mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |

		BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |

		BIT(WAKE_CNTRL_OFF_S4);



	pd = pin_desc_get(gpio_dev->pctrl, pin);

	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;

		const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);



		if (!pd)

		return;

			continue;



		raw_spin_lock_irqsave(&gpio_dev->lock, flags);

	pin_reg = readl(gpio_dev->base + pin * 4);



		pin_reg = readl(gpio_dev->base + i * 4);

		pin_reg &= ~mask;

	writel(pin_reg, gpio_dev->base + pin * 4);

		writel(pin_reg, gpio_dev->base + i * 4);



		raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);

	}



static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

{

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	int i;



	for (i = 0; i < desc->npins; i++)

		amd_gpio_irq_init_pin(gpio_dev, i);

}



#ifdef CONFIG_PM_SLEEP
@@ -952,10 +950,8 @@ static int amd_gpio_resume(struct device *dev) 
	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;



		if (!amd_gpio_should_save(gpio_dev, pin)) {

			amd_gpio_irq_init_pin(gpio_dev, pin);

		if (!amd_gpio_should_save(gpio_dev, pin))

			continue;

		}



		raw_spin_lock_irqsave(&gpio_dev->lock, flags);

		gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;