Unverified Commit 5302e1ff authored by Chin-Ting Kuo's avatar Chin-Ting Kuo Committed by Mark Brown
Browse files

spi: aspeed: Fix typo in mode_bits field for AST2600 platform 



Both quad SPI TX and RX modes can be supported on AST2600.
Correct typo in mode_bits field in both ast2600_fmc_data
and ast2600_spi_data structs.

Signed-off-by: default avatarChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: default avatarCédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20221005083209.222272-1-chin-ting_kuo@aspeedtech.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b25fe93f

drivers/spi/spi-aspeed-smc.c

+2 −2
Original line number Diff line number Diff line
@@ -1163,7 +1163,7 @@ static const struct aspeed_spi_data ast2500_spi_data = { 
static const struct aspeed_spi_data ast2600_fmc_data = {

	.max_cs	       = 3,

	.hastype       = false,

	.mode_bits     = SPI_RX_QUAD | SPI_RX_QUAD,

	.mode_bits     = SPI_RX_QUAD | SPI_TX_QUAD,

	.we0	       = 16,

	.ctl0	       = CE0_CTRL_REG,

	.timing	       = CE0_TIMING_COMPENSATION_REG,
@@ -1178,7 +1178,7 @@ static const struct aspeed_spi_data ast2600_fmc_data = { 
static const struct aspeed_spi_data ast2600_spi_data = {

	.max_cs	       = 2,

	.hastype       = false,

	.mode_bits     = SPI_RX_QUAD | SPI_RX_QUAD,

	.mode_bits     = SPI_RX_QUAD | SPI_TX_QUAD,

	.we0	       = 16,

	.ctl0	       = CE0_CTRL_REG,

	.timing	       = CE0_TIMING_COMPENSATION_REG,