Loading arch/sh/mm/cache-sh4.c +5 −9 Original line number Diff line number Diff line Loading @@ -11,12 +11,8 @@ */ #include <linux/init.h> #include <linux/mm.h> #include <asm/addrspace.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/pgalloc.h> #include <linux/io.h> #include <linux/mutex.h> #include <asm/mmu_context.h> #include <asm/cacheflush.h> Loading Loading @@ -83,9 +79,9 @@ static void __init emit_cache_params(void) */ /* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */ #define MAX_P3_SEMAPHORES 16 #define MAX_P3_MUTEXES 16 struct semaphore p3map_sem[MAX_P3_SEMAPHORES]; struct mutex p3map_mutex[MAX_P3_MUTEXES]; void __init p3_cache_init(void) { Loading Loading @@ -115,7 +111,7 @@ void __init p3_cache_init(void) panic("%s failed.", __FUNCTION__); for (i = 0; i < cpu_data->dcache.n_aliases; i++) sema_init(&p3map_sem[i], 1); mutex_init(&p3map_mutex[i]); } /* Loading arch/sh/mm/pg-sh4.c +6 −17 Original line number Diff line number Diff line Loading @@ -6,22 +6,12 @@ * * Released under the terms of the GNU GPL v2.0. */ #include <linux/init.h> #include <linux/mman.h> #include <linux/mm.h> #include <linux/threads.h> #include <asm/addrspace.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/pgalloc.h> #include <linux/mutex.h> #include <asm/mmu_context.h> #include <asm/cacheflush.h> extern struct semaphore p3map_sem[]; extern struct mutex p3map_mutex[]; #define CACHE_ALIAS (cpu_data->dcache.alias_mask) Loading @@ -47,7 +37,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) unsigned long flags; entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); down(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); Loading @@ -55,7 +45,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) update_mmu_cache(NULL, p3_addr, entry); __clear_user_page((void *)p3_addr, to); pte_clear(&init_mm, p3_addr, pte); up(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } Loading Loading @@ -83,7 +73,7 @@ void copy_user_page(void *to, void *from, unsigned long address, unsigned long flags; entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); down(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); Loading @@ -91,7 +81,7 @@ void copy_user_page(void *to, void *from, unsigned long address, update_mmu_cache(NULL, p3_addr, entry); __copy_user_page((void *)p3_addr, from, to); pte_clear(&init_mm, p3_addr, pte); up(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } Loading @@ -114,4 +104,3 @@ inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t } return pte; } Loading
arch/sh/mm/cache-sh4.c +5 −9 Original line number Diff line number Diff line Loading @@ -11,12 +11,8 @@ */ #include <linux/init.h> #include <linux/mm.h> #include <asm/addrspace.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/pgalloc.h> #include <linux/io.h> #include <linux/mutex.h> #include <asm/mmu_context.h> #include <asm/cacheflush.h> Loading Loading @@ -83,9 +79,9 @@ static void __init emit_cache_params(void) */ /* Worst case assumed to be 64k cache, direct-mapped i.e. 4 synonym bits. */ #define MAX_P3_SEMAPHORES 16 #define MAX_P3_MUTEXES 16 struct semaphore p3map_sem[MAX_P3_SEMAPHORES]; struct mutex p3map_mutex[MAX_P3_MUTEXES]; void __init p3_cache_init(void) { Loading Loading @@ -115,7 +111,7 @@ void __init p3_cache_init(void) panic("%s failed.", __FUNCTION__); for (i = 0; i < cpu_data->dcache.n_aliases; i++) sema_init(&p3map_sem[i], 1); mutex_init(&p3map_mutex[i]); } /* Loading
arch/sh/mm/pg-sh4.c +6 −17 Original line number Diff line number Diff line Loading @@ -6,22 +6,12 @@ * * Released under the terms of the GNU GPL v2.0. */ #include <linux/init.h> #include <linux/mman.h> #include <linux/mm.h> #include <linux/threads.h> #include <asm/addrspace.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/pgalloc.h> #include <linux/mutex.h> #include <asm/mmu_context.h> #include <asm/cacheflush.h> extern struct semaphore p3map_sem[]; extern struct mutex p3map_mutex[]; #define CACHE_ALIAS (cpu_data->dcache.alias_mask) Loading @@ -47,7 +37,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) unsigned long flags; entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); down(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); Loading @@ -55,7 +45,7 @@ void clear_user_page(void *to, unsigned long address, struct page *page) update_mmu_cache(NULL, p3_addr, entry); __clear_user_page((void *)p3_addr, to); pte_clear(&init_mm, p3_addr, pte); up(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } Loading Loading @@ -83,7 +73,7 @@ void copy_user_page(void *to, void *from, unsigned long address, unsigned long flags; entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); down(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); set_pte(pte, entry); local_irq_save(flags); __flush_tlb_page(get_asid(), p3_addr); Loading @@ -91,7 +81,7 @@ void copy_user_page(void *to, void *from, unsigned long address, update_mmu_cache(NULL, p3_addr, entry); __copy_user_page((void *)p3_addr, from, to); pte_clear(&init_mm, p3_addr, pte); up(&p3map_sem[(address & CACHE_ALIAS)>>12]); mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); } } Loading @@ -114,4 +104,3 @@ inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t } return pte; }