Commit 5280e481 authored by Chin-Yen Lee's avatar Chin-Yen Lee Committed by Kalle Valo
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wifi: rtw89: pci: concentrate control function of TX DMA channel



Different chips use different register and mask for
tx dma channels, so concentrate them.

Signed-off-by: default avatarChin-Yen Lee <timlee@realtek.com>
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220912071706.13619-4-pkshih@realtek.com
parent 52f12705
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+23 −8
Original line number Diff line number Diff line
@@ -169,6 +169,23 @@ static int rtw89_pci_rxbd_info_update(struct rtw89_dev *rtwdev,
	return 0;
}

static void rtw89_pci_ctrl_txdma_ch_pcie(struct rtw89_dev *rtwdev, bool enable)
{
	const struct rtw89_pci_info *info = rtwdev->pci_info;
	const struct rtw89_reg_def *dma_stop1 = &info->dma_stop1;
	const struct rtw89_reg_def *dma_stop2 = &info->dma_stop2;

	if (enable) {
		rtw89_write32_clr(rtwdev, dma_stop1->addr, dma_stop1->mask);
		if (dma_stop2->addr)
			rtw89_write32_clr(rtwdev, dma_stop2->addr, dma_stop2->mask);
	} else {
		rtw89_write32_set(rtwdev, dma_stop1->addr, dma_stop1->mask);
		if (dma_stop2->addr)
			rtw89_write32_set(rtwdev, dma_stop2->addr, dma_stop2->mask);
	}
}

static bool
rtw89_skb_put_rx_data(struct rtw89_dev *rtwdev, bool fs, bool ls,
		      struct sk_buff *new,
@@ -2443,7 +2460,7 @@ static int rtw89_pci_ops_mac_pre_init(struct rtw89_dev *rtwdev)
	rtw89_pci_set_dbg(rtwdev);
	rtw89_pci_set_keep_reg(rtwdev);

	rtw89_write32_set(rtwdev, info->dma_stop1_reg, B_AX_STOP_WPDMA);
	rtw89_write32_set(rtwdev, info->dma_stop1.addr, B_AX_STOP_WPDMA);

	/* stop DMA activities */
	rtw89_pci_ctrl_dma_all(rtwdev, false);
@@ -2466,10 +2483,9 @@ static int rtw89_pci_ops_mac_pre_init(struct rtw89_dev *rtwdev)
		return ret;
	}

	/* enable FW CMD queue to download firmware */
	rtw89_write32_set(rtwdev, info->dma_stop1_reg, B_AX_TX_STOP1_ALL);
	rtw89_write32_clr(rtwdev, info->dma_stop1_reg, B_AX_STOP_CH12);
	rtw89_write32_set(rtwdev, info->dma_stop2_reg, B_AX_TX_STOP2_ALL);
	/* disable all channels except to FW CMD channel to download firmware */
	rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, false);
	rtw89_write32_clr(rtwdev, info->dma_stop1.addr, B_AX_STOP_CH12);

	/* start DMA activities */
	rtw89_pci_ctrl_dma_all(rtwdev, true);
@@ -2582,11 +2598,10 @@ static int rtw89_pci_ops_mac_post_init(struct rtw89_dev *rtwdev)
	}

	/* enable DMA for all queues */
	rtw89_write32_clr(rtwdev, info->dma_stop1_reg, B_AX_TX_STOP1_ALL);
	rtw89_write32_clr(rtwdev, info->dma_stop2_reg, B_AX_TX_STOP2_ALL);
	rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, true);

	/* Release PCI IO */
	rtw89_write32_clr(rtwdev, info->dma_stop1_reg,
	rtw89_write32_clr(rtwdev, info->dma_stop1.addr,
			  B_AX_STOP_WPDMA | B_AX_STOP_PCIEIO);

	return 0;
+12 −2
Original line number Diff line number Diff line
@@ -410,6 +410,16 @@
#define B_AX_STOP_RPQ			BIT(1)
#define B_AX_STOP_RXQ			BIT(0)
#define B_AX_TX_STOP1_ALL		GENMASK(18, 8)
#define B_AX_TX_STOP1_MASK		(B_AX_STOP_ACH0 | B_AX_STOP_ACH1 | \
					 B_AX_STOP_ACH2 | B_AX_STOP_ACH3 | \
					 B_AX_STOP_ACH4 | B_AX_STOP_ACH5 | \
					 B_AX_STOP_ACH6 | B_AX_STOP_ACH7 | \
					 B_AX_STOP_CH8 | B_AX_STOP_CH9 | \
					 B_AX_STOP_CH12)
#define B_AX_TX_STOP1_MASK_V1		(B_AX_STOP_ACH0 | B_AX_STOP_ACH1 | \
					 B_AX_STOP_ACH2 | B_AX_STOP_ACH3 | \
					 B_AX_STOP_CH8 | B_AX_STOP_CH9 | \
					 B_AX_STOP_CH12)

#define R_AX_PCIE_DMA_STOP2	0x1310
#define B_AX_STOP_CH11			BIT(1)
@@ -742,8 +752,8 @@ struct rtw89_pci_info {
	u32 max_tag_num_mask;
	u32 rxbd_rwptr_clr_reg;
	u32 txbd_rwptr_clr2_reg;
	u32 dma_stop1_reg;
	u32 dma_stop2_reg;
	struct rtw89_reg_def dma_stop1;
	struct rtw89_reg_def dma_stop2;
	u32 dma_busy1_reg;
	u32 dma_busy2_reg;
	u32 dma_busy3_reg;
+2 −2
Original line number Diff line number Diff line
@@ -33,8 +33,8 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
	.max_tag_num_mask	= B_AX_MAX_TAG_NUM,
	.rxbd_rwptr_clr_reg	= R_AX_RXBD_RWPTR_CLR,
	.txbd_rwptr_clr2_reg	= R_AX_TXBD_RWPTR_CLR2,
	.dma_stop1_reg		= R_AX_PCIE_DMA_STOP1,
	.dma_stop2_reg		= R_AX_PCIE_DMA_STOP2,
	.dma_stop1		= {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK},
	.dma_stop2		= {R_AX_PCIE_DMA_STOP2, B_AX_TX_STOP2_ALL},
	.dma_busy1_reg		= R_AX_PCIE_DMA_BUSY1,
	.dma_busy2_reg		= R_AX_PCIE_DMA_BUSY2,
	.dma_busy3_reg		= R_AX_PCIE_DMA_BUSY1,
+2 −2
Original line number Diff line number Diff line
@@ -42,8 +42,8 @@ static const struct rtw89_pci_info rtw8852c_pci_info = {
	.max_tag_num_mask	= B_AX_MAX_TAG_NUM_V1_MASK,
	.rxbd_rwptr_clr_reg	= R_AX_RXBD_RWPTR_CLR_V1,
	.txbd_rwptr_clr2_reg	= R_AX_TXBD_RWPTR_CLR2_V1,
	.dma_stop1_reg		= R_AX_HAXI_DMA_STOP1,
	.dma_stop2_reg		= R_AX_HAXI_DMA_STOP2,
	.dma_stop1		= {R_AX_HAXI_DMA_STOP1, B_AX_TX_STOP1_MASK},
	.dma_stop2		= {R_AX_HAXI_DMA_STOP2, B_AX_TX_STOP2_ALL},
	.dma_busy1_reg		= R_AX_HAXI_DMA_BUSY1,
	.dma_busy2_reg		= R_AX_HAXI_DMA_BUSY2,
	.dma_busy3_reg		= R_AX_HAXI_DMA_BUSY3,