Unverified Commit 52487e21 authored by Jungseung Lee's avatar Jungseung Lee Committed by Tudor Ambarus
Browse files

mtd: spi-nor: Rename SR_TB to indicate the bit used 



Each vendor uses different bits for SR_TB of flash.
To avoid ambiguity, rename SR_TB to indicate the bit used.

Signed-off-by: default avatarJungseung Lee <js07.lee@samsung.com>
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
parent 01916e04

drivers/mtd/spi-nor/spi-nor.c

+5 −5
Original line number Diff line number Diff line
@@ -1771,7 +1771,7 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, 
	} else {

		pow = ((sr & mask) ^ mask) >> shift;

		*len = mtd->size >> pow;

		if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB)

		if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB_BIT5)

			*ofs = 0;

		else

			*ofs = mtd->size - *len;
@@ -1903,13 +1903,13 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
	if (!(val & mask))

		return -EINVAL;



	status_new = (status_old & ~mask & ~SR_TB) | val;

	status_new = (status_old & ~mask & ~SR_TB_BIT5) | val;



	/* Disallow further writes if WP pin is asserted */

	status_new |= SR_SRWD;



	if (!use_top)

		status_new |= SR_TB;

		status_new |= SR_TB_BIT5;



	/* Don't bother if they're the same */

	if (status_new == status_old)
@@ -1987,14 +1987,14 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) 
			return -EINVAL;

	}



	status_new = (status_old & ~mask & ~SR_TB) | val;

	status_new = (status_old & ~mask & ~SR_TB_BIT5) | val;



	/* Don't protect status register if we're fully unlocked */

	if (lock_len == 0)

		status_new &= ~SR_SRWD;



	if (!use_top)

		status_new |= SR_TB;

		status_new |= SR_TB_BIT5;



	/* Don't bother if they're the same */

	if (status_new == status_old)

include/linux/mtd/spi-nor.h

+2 −1
Original line number Diff line number Diff line
@@ -128,7 +128,8 @@ 
#define SR_BP0			BIT(2)	/* Block protect 0 */

#define SR_BP1			BIT(3)	/* Block protect 1 */

#define SR_BP2			BIT(4)	/* Block protect 2 */

#define SR_TB			BIT(5)	/* Top/Bottom protect */

#define SR_TB_BIT5		BIT(5)	/* Top/Bottom protect */

#define SR_TB_BIT6		BIT(6)	/* Top/Bottom protect */

#define SR_SRWD			BIT(7)	/* SR write protect */

/* Spansion/Cypress specific status bits */

#define SR_E_ERR		BIT(5)