Commit 521568cf authored by Sam Protsenko's avatar Sam Protsenko Committed by Krzysztof Kozlowski
Browse files

dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D 



CMU_G3D generates Gondul GPU and bus clocks for BLK_G3D.
Add clock indices and binding documentation for CMU_G3D.

Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223042133.26551-2-semen.protsenko@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent fe15c26e

Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

+19 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ properties: 
      - samsung,exynos850-cmu-cmgp

      - samsung,exynos850-cmu-core

      - samsung,exynos850-cmu-dpu

      - samsung,exynos850-cmu-g3d

      - samsung,exynos850-cmu-hsi

      - samsung,exynos850-cmu-is

      - samsung,exynos850-cmu-mfcmscl
@@ -169,6 +170,24 @@ allOf: 
            - const: oscclk

            - const: dout_dpu



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-g3d



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: G3D clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_g3d_switch



  - if:

      properties:

        compatible:

include/dt-bindings/clock/exynos850.h

+19 −1
Original line number Diff line number Diff line
@@ -85,7 +85,10 @@ 
#define CLK_DOUT_MFCMSCL_M2M		73

#define CLK_DOUT_MFCMSCL_MCSC		74

#define CLK_DOUT_MFCMSCL_JPEG		75

#define TOP_NR_CLK			76

#define CLK_MOUT_G3D_SWITCH		76

#define CLK_GOUT_G3D_SWITCH		77

#define CLK_DOUT_G3D_SWITCH		78

#define TOP_NR_CLK			79



/* CMU_APM */

#define CLK_RCO_I3C_PMIC		1
@@ -195,6 +198,21 @@ 
#define CLK_GOUT_SYSREG_CMGP_PCLK	15

#define CMGP_NR_CLK			16



/* CMU_G3D */

#define CLK_FOUT_G3D_PLL		1

#define CLK_MOUT_G3D_PLL		2

#define CLK_MOUT_G3D_SWITCH_USER	3

#define CLK_MOUT_G3D_BUSD		4

#define CLK_DOUT_G3D_BUSP		5

#define CLK_GOUT_G3D_CMU_G3D_PCLK	6

#define CLK_GOUT_G3D_GPU_CLK		7

#define CLK_GOUT_G3D_TZPC_PCLK		8

#define CLK_GOUT_G3D_GRAY2BIN_CLK	9

#define CLK_GOUT_G3D_BUSD_CLK		10

#define CLK_GOUT_G3D_BUSP_CLK		11

#define CLK_GOUT_G3D_SYSREG_PCLK	12

#define G3D_NR_CLK			13



/* CMU_HSI */

#define CLK_MOUT_HSI_BUS_USER		1

#define CLK_MOUT_HSI_MMC_CARD_USER	2