Commit 5206b980 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch kvm-arm64/selftest/vgic-5.18 into kvmarm-master/next 



* kvm-arm64/selftest/vgic-5.18:
  : .
  : A bunch of selftest fixes, courtesy of Ricardo Koller
  : .
  kvm: selftests: aarch64: use a tighter assert in vgic_poke_irq()
  kvm: selftests: aarch64: fix some vgic related comments
  kvm: selftests: aarch64: fix the failure check in kvm_set_gsi_routing_irqchip_check
  kvm: selftests: aarch64: pass vgic_irq guest args as a pointer
  kvm: selftests: aarch64: fix assert in gicv3_access_reg

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents ebca6897 b53de63a

tools/testing/selftests/kvm/aarch64/vgic_irq.c

+26 −19
Original line number Diff line number Diff line
@@ -306,7 +306,8 @@ static void guest_restore_active(struct test_args *args, 
	uint32_t prio, intid, ap1r;

	int i;



	/* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs

	/*

	 * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs

	 * in descending order, so intid+1 can preempt intid.

	 */

	for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) {
@@ -315,7 +316,8 @@ static void guest_restore_active(struct test_args *args, 
		gic_set_priority(intid, prio);

	}



	/* In a real migration, KVM would restore all GIC state before running

	/*

	 * In a real migration, KVM would restore all GIC state before running

	 * guest code.

	 */

	for (i = 0; i < num; i++) {
@@ -472,10 +474,10 @@ static void test_restore_active(struct test_args *args, struct kvm_inject_desc * 
		guest_restore_active(args, MIN_SPI, 4, f->cmd);

}



static void guest_code(struct test_args args)

static void guest_code(struct test_args *args)

{

	uint32_t i, nr_irqs = args.nr_irqs;

	bool level_sensitive = args.level_sensitive;

	uint32_t i, nr_irqs = args->nr_irqs;

	bool level_sensitive = args->level_sensitive;

	struct kvm_inject_desc *f, *inject_fns;



	gic_init(GIC_V3, 1, dist, redist);
@@ -484,11 +486,11 @@ static void guest_code(struct test_args args) 
		gic_irq_enable(i);



	for (i = MIN_SPI; i < nr_irqs; i++)

		gic_irq_set_config(i, !args.level_sensitive);

		gic_irq_set_config(i, !level_sensitive);



	gic_set_eoi_split(args.eoi_split);

	gic_set_eoi_split(args->eoi_split);



	reset_priorities(&args);

	reset_priorities(args);

	gic_set_priority_mask(CPU_PRIO_MASK);



	inject_fns  = level_sensitive ? inject_level_fns
@@ -497,17 +499,18 @@ static void guest_code(struct test_args args) 
	local_irq_enable();



	/* Start the tests. */

	for_each_supported_inject_fn(&args, inject_fns, f) {

		test_injection(&args, f);

		test_preemption(&args, f);

		test_injection_failure(&args, f);

	for_each_supported_inject_fn(args, inject_fns, f) {

		test_injection(args, f);

		test_preemption(args, f);

		test_injection_failure(args, f);

	}



	/* Restore the active state of IRQs. This would happen when live

	/*

	 * Restore the active state of IRQs. This would happen when live

	 * migrating IRQs in the middle of being handled.

	 */

	for_each_supported_activate_fn(&args, set_active_fns, f)

		test_restore_active(&args, f);

	for_each_supported_activate_fn(args, set_active_fns, f)

		test_restore_active(args, f);



	GUEST_DONE();

}
@@ -573,8 +576,8 @@ static void kvm_set_gsi_routing_irqchip_check(struct kvm_vm *vm, 
		kvm_gsi_routing_write(vm, routing);

	} else {

		ret = _kvm_gsi_routing_write(vm, routing);

		/* The kernel only checks for KVM_IRQCHIP_NUM_PINS. */

		if (intid >= KVM_IRQCHIP_NUM_PINS)

		/* The kernel only checks e->irqchip.pin >= KVM_IRQCHIP_NUM_PINS */

		if (((uint64_t)intid + num - 1 - MIN_SPI) >= KVM_IRQCHIP_NUM_PINS)

			TEST_ASSERT(ret != 0 && errno == EINVAL,

				"Bad intid %u did not cause KVM_SET_GSI_ROUTING "

				"error: rc: %i errno: %i", intid, ret, errno);
@@ -739,6 +742,7 @@ static void test_vgic(uint32_t nr_irqs, bool level_sensitive, bool eoi_split) 
	int gic_fd;

	struct kvm_vm *vm;

	struct kvm_inject_args inject_args;

	vm_vaddr_t args_gva;



	struct test_args args = {

		.nr_irqs = nr_irqs,
@@ -757,7 +761,9 @@ static void test_vgic(uint32_t nr_irqs, bool level_sensitive, bool eoi_split) 
	vcpu_init_descriptor_tables(vm, VCPU_ID);



	/* Setup the guest args page (so it gets the args). */

	vcpu_args_set(vm, 0, 1, args);

	args_gva = vm_vaddr_alloc_page(vm);

	memcpy(addr_gva2hva(vm, args_gva), &args, sizeof(args));

	vcpu_args_set(vm, 0, 1, args_gva);



	gic_fd = vgic_v3_setup(vm, 1, nr_irqs,

			GICD_BASE_GPA, GICR_BASE_GPA);
@@ -837,7 +843,8 @@ int main(int argc, char **argv) 
		}

	}



	/* If the user just specified nr_irqs and/or gic_version, then run all

	/*

	 * If the user just specified nr_irqs and/or gic_version, then run all

	 * combinations.

	 */

	if (default_args) {

tools/testing/selftests/kvm/lib/aarch64/gic_v3.c

+7 −5
Original line number Diff line number Diff line
@@ -105,7 +105,8 @@ static void gicv3_set_eoi_split(bool split) 
{

	uint32_t val;



	/* All other fields are read-only, so no need to read CTLR first. In

	/*

	 * All other fields are read-only, so no need to read CTLR first. In

	 * fact, the kernel does the same.

	 */

	val = split ? (1U << 1) : 0;
@@ -159,9 +160,10 @@ static void gicv3_access_reg(uint32_t intid, uint64_t offset, 
	uint32_t cpu_or_dist;



	GUEST_ASSERT(bits_per_field <= reg_bits);

	GUEST_ASSERT(*val < (1U << bits_per_field));

	/* Some registers like IROUTER are 64 bit long. Those are currently not

	 * supported by readl nor writel, so just asserting here until then.

	GUEST_ASSERT(!write || *val < (1U << bits_per_field));

	/*

	 * This function does not support 64 bit accesses. Just asserting here

	 * until we implement readq/writeq.

	 */

	GUEST_ASSERT(reg_bits == 32);

tools/testing/selftests/kvm/lib/aarch64/vgic.c

+5 −4
Original line number Diff line number Diff line
@@ -138,9 +138,6 @@ static void vgic_poke_irq(int gic_fd, uint32_t intid, 
	uint64_t val;

	bool intid_is_private = INTID_IS_SGI(intid) || INTID_IS_PPI(intid);



	/* Check that the addr part of the attr is within 32 bits. */

	assert(attr <= KVM_DEV_ARM_VGIC_OFFSET_MASK);



	uint32_t group = intid_is_private ? KVM_DEV_ARM_VGIC_GRP_REDIST_REGS

					  : KVM_DEV_ARM_VGIC_GRP_DIST_REGS;
@@ -150,7 +147,11 @@ static void vgic_poke_irq(int gic_fd, uint32_t intid, 
		attr += SZ_64K;

	}



	/* All calls will succeed, even with invalid intid's, as long as the

	/* Check that the addr part of the attr is within 32 bits. */

	assert((attr & ~KVM_DEV_ARM_VGIC_OFFSET_MASK) == 0);



	/*

	 * All calls will succeed, even with invalid intid's, as long as the

	 * addr part of the attr is within 32 bits (checked above). An invalid

	 * intid will just make the read/writes point to above the intended

	 * register space (i.e., ICPENDR after ISPENDR).