Commit 51ed2c2b authored by Sham Muthayyan's avatar Sham Muthayyan Committed by Lorenzo Pieralisi
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PCI: qcom: Support pci speed set for ipq806x 

Some SoC based on ipq8064/5 needs to be limited to pci GEN1 speed due to
some hardware limitations. Add support for speed setting defined by the
max-link-speed binding. If not defined the max speed is set to GEN2 by
default.

Link: https://lore.kernel.org/r/20200615210608.21469-12-ansuelsmth@gmail.com


Signed-off-by: default avatarSham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: default avatarAnsuel Smith <ansuelsmth@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarStanimir Varbanov <svarbanov@mm-sol.com>
parent d511580e

drivers/pci/controller/dwc/pcie-qcom.c

+13 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <linux/slab.h>

#include <linux/types.h>



#include "../../pci.h"

#include "pcie-designware.h"



#define PCIE20_PARF_SYS_CTRL			0x00
@@ -99,6 +100,8 @@ 
#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE	0x358

#define SLV_ADDR_SPACE_SZ			0x10000000



#define PCIE20_LNK_CONTROL2_LINK_STATUS2	0xa0



#define DEVICE_TYPE_RC				0x4



#define QCOM_PCIE_2_1_0_MAX_SUPPLY	3
@@ -195,6 +198,7 @@ struct qcom_pcie { 
	struct phy *phy;

	struct gpio_desc *reset;

	const struct qcom_pcie_ops *ops;

	int gen;

};



#define to_qcom_pcie(x)		dev_get_drvdata((x)->dev)
@@ -395,6 +399,11 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) 
	/* wait for clock acquisition */

	usleep_range(1000, 1500);



	if (pcie->gen == 1) {

		val = readl(pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);

		val |= PCI_EXP_LNKSTA_CLS_2_5GB;

		writel(val, pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);

	}



	/* Set the Max TLP size to 2K, instead of using default of 4K */

	writel(CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K,
@@ -1397,6 +1406,10 @@ static int qcom_pcie_probe(struct platform_device *pdev) 
		goto err_pm_runtime_put;

	}



	pcie->gen = of_pci_get_max_link_speed(pdev->dev.of_node);

	if (pcie->gen < 0)

		pcie->gen = 2;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");

	pcie->parf = devm_ioremap_resource(dev, res);

	if (IS_ERR(pcie->parf)) {