Commit 51a4df60 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Jakub Kicinski
Browse files

net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data struct to u64 



This is a preliminary patch to introduce support for MT7988 SoC.

Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarDaniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/9499ac3670b2fc5b444404b84e8a4a169beabbf2.1690246066.git.daniel@makrotopia.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1953f134

drivers/net/ethernet/mediatek/mtk_eth_path.c

+11 −11
Original line number Diff line number Diff line
@@ -15,10 +15,10 @@ 
struct mtk_eth_muxc {

	const char	*name;

	int		cap_bit;

	int		(*set_path)(struct mtk_eth *eth, int path);

	int		(*set_path)(struct mtk_eth *eth, u64 path);

};



static const char *mtk_eth_path_name(int path)

static const char *mtk_eth_path_name(u64 path)

{

	switch (path) {

	case MTK_ETH_PATH_GMAC1_RGMII:
@@ -40,7 +40,7 @@ static const char *mtk_eth_path_name(int path) 
	}

}



static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path)

static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path)

{

	bool updated = true;

	u32 val, mask, set;
@@ -71,7 +71,7 @@ static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path) 
	return 0;

}



static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path)

static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, u64 path)

{

	unsigned int val = 0;

	bool updated = true;
@@ -94,7 +94,7 @@ static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path) 
	return 0;

}



static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path)

static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, u64 path)

{

	unsigned int val = 0, mask = 0, reg = 0;

	bool updated = true;
@@ -125,7 +125,7 @@ static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path) 
	return 0;

}



static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path)

static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)

{

	unsigned int val = 0;

	bool updated = true;
@@ -163,7 +163,7 @@ static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path) 
	return 0;

}



static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, int path)

static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path)

{

	unsigned int val = 0;

	bool updated = true;
@@ -218,7 +218,7 @@ static const struct mtk_eth_muxc mtk_eth_muxc[] = { 
	},

};



static int mtk_eth_mux_setup(struct mtk_eth *eth, int path)

static int mtk_eth_mux_setup(struct mtk_eth *eth, u64 path)

{

	int i, err = 0;
@@ -249,7 +249,7 @@ static int mtk_eth_mux_setup(struct mtk_eth *eth, int path) 


int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)

{

	int path;

	u64 path;



	path = (mac_id == 0) ?  MTK_ETH_PATH_GMAC1_SGMII :

				MTK_ETH_PATH_GMAC2_SGMII;
@@ -260,7 +260,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) 


int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)

{

	int path = 0;

	u64 path = 0;



	if (mac_id == 1)

		path = MTK_ETH_PATH_GMAC2_GEPHY;
@@ -274,7 +274,7 @@ int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id) 


int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id)

{

	int path;

	u64 path;



	path = (mac_id == 0) ?  MTK_ETH_PATH_GMAC1_RGMII :

				MTK_ETH_PATH_GMAC2_RGMII;

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+28 −28
Original line number Diff line number Diff line
@@ -866,41 +866,41 @@ enum mkt_eth_capabilities { 
};



/* Supported hardware group on SoCs */

#define MTK_RGMII		BIT(MTK_RGMII_BIT)

#define MTK_TRGMII		BIT(MTK_TRGMII_BIT)

#define MTK_SGMII		BIT(MTK_SGMII_BIT)

#define MTK_ESW			BIT(MTK_ESW_BIT)

#define MTK_GEPHY		BIT(MTK_GEPHY_BIT)

#define MTK_MUX			BIT(MTK_MUX_BIT)

#define MTK_INFRA		BIT(MTK_INFRA_BIT)

#define MTK_SHARED_SGMII	BIT(MTK_SHARED_SGMII_BIT)

#define MTK_HWLRO		BIT(MTK_HWLRO_BIT)

#define MTK_SHARED_INT		BIT(MTK_SHARED_INT_BIT)

#define MTK_TRGMII_MT7621_CLK	BIT(MTK_TRGMII_MT7621_CLK_BIT)

#define MTK_QDMA		BIT(MTK_QDMA_BIT)

#define MTK_SOC_MT7628		BIT(MTK_SOC_MT7628_BIT)

#define MTK_RSTCTRL_PPE1	BIT(MTK_RSTCTRL_PPE1_BIT)

#define MTK_U3_COPHY_V2		BIT(MTK_U3_COPHY_V2_BIT)

#define MTK_RGMII		BIT_ULL(MTK_RGMII_BIT)

#define MTK_TRGMII		BIT_ULL(MTK_TRGMII_BIT)

#define MTK_SGMII		BIT_ULL(MTK_SGMII_BIT)

#define MTK_ESW			BIT_ULL(MTK_ESW_BIT)

#define MTK_GEPHY		BIT_ULL(MTK_GEPHY_BIT)

#define MTK_MUX			BIT_ULL(MTK_MUX_BIT)

#define MTK_INFRA		BIT_ULL(MTK_INFRA_BIT)

#define MTK_SHARED_SGMII	BIT_ULL(MTK_SHARED_SGMII_BIT)

#define MTK_HWLRO		BIT_ULL(MTK_HWLRO_BIT)

#define MTK_SHARED_INT		BIT_ULL(MTK_SHARED_INT_BIT)

#define MTK_TRGMII_MT7621_CLK	BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT)

#define MTK_QDMA		BIT_ULL(MTK_QDMA_BIT)

#define MTK_SOC_MT7628		BIT_ULL(MTK_SOC_MT7628_BIT)

#define MTK_RSTCTRL_PPE1	BIT_ULL(MTK_RSTCTRL_PPE1_BIT)

#define MTK_U3_COPHY_V2		BIT_ULL(MTK_U3_COPHY_V2_BIT)



#define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW		\

	BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)

	BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)

#define MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY	\

	BIT(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)

	BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)

#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY		\

	BIT(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)

	BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)

#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII	\

	BIT(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)

	BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)

#define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII	\

	BIT(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)

	BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)



/* Supported path present on SoCs */

#define MTK_ETH_PATH_GMAC1_RGMII	BIT(MTK_ETH_PATH_GMAC1_RGMII_BIT)

#define MTK_ETH_PATH_GMAC1_TRGMII	BIT(MTK_ETH_PATH_GMAC1_TRGMII_BIT)

#define MTK_ETH_PATH_GMAC1_SGMII	BIT(MTK_ETH_PATH_GMAC1_SGMII_BIT)

#define MTK_ETH_PATH_GMAC2_RGMII	BIT(MTK_ETH_PATH_GMAC2_RGMII_BIT)

#define MTK_ETH_PATH_GMAC2_SGMII	BIT(MTK_ETH_PATH_GMAC2_SGMII_BIT)

#define MTK_ETH_PATH_GMAC2_GEPHY	BIT(MTK_ETH_PATH_GMAC2_GEPHY_BIT)

#define MTK_ETH_PATH_GDM1_ESW		BIT(MTK_ETH_PATH_GDM1_ESW_BIT)

#define MTK_ETH_PATH_GMAC1_RGMII	BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)

#define MTK_ETH_PATH_GMAC1_TRGMII	BIT_ULL(MTK_ETH_PATH_GMAC1_TRGMII_BIT)

#define MTK_ETH_PATH_GMAC1_SGMII	BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)

#define MTK_ETH_PATH_GMAC2_RGMII	BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)

#define MTK_ETH_PATH_GMAC2_SGMII	BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)

#define MTK_ETH_PATH_GMAC2_GEPHY	BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)

#define MTK_ETH_PATH_GDM1_ESW		BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)



#define MTK_GMAC1_RGMII		(MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII)

#define MTK_GMAC1_TRGMII	(MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
@@ -1045,7 +1045,7 @@ struct mtk_reg_map { 
struct mtk_soc_data {

	const struct mtk_reg_map *reg_map;

	u32             ana_rgc3;

	u32		caps;

	u64		caps;

	u32		required_clks;

	bool		required_pctl;

	u8		offload_version;