Commit 519c4967 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-dts: use clock in pci phy nodes 



MT7621 SoC clock driver has already mainlined in
'commit 48df7a26 ("clk: ralink: add clock driver for mt7621 SoC")'
Hence we can use the clock in pcie phy nodes to
be able to get it from there in driver code.

Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210514112820.32499-1-sergio.paracuellos@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5f8e9aff

drivers/staging/mt7621-dts/mt7621.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -548,12 +548,14 @@ 
	pcie0_phy: pcie-phy@1e149000 {

		compatible = "mediatek,mt7621-pci-phy";

		reg = <0x1e149000 0x0700>;

		clocks = <&sysc MT7621_CLK_XTAL>;

		#phy-cells = <1>;

	};



	pcie2_phy: pcie-phy@1e14a000 {

		compatible = "mediatek,mt7621-pci-phy";

		reg = <0x1e14a000 0x0700>;

		clocks = <&sysc MT7621_CLK_XTAL>;

		#phy-cells = <1>;

	};

};