Commit 518ea89e authored by Hao Lan's avatar Hao Lan Committed by Hao Chen
Browse files

net: hns3: add support for vf multiple tcs 

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IALRBN


CVE: NA

--------------------------------------------------------

Add ieee_setets and ieee_getets supported for vf. Configures and queries
vf multi-TC parameters, including the number of vf TCs, scheduling mode,
and bandwidth weight. The number of TCs, scheduling mode, and bandwidth
weight configured for the vf must be the same as those configured
for the pf. When multiple TCs are configured for a vf, the pf does
not allow the modification of TC parameters until all vfs are configured
to work in single-TC mode.

Signed-off-by: default avatarJian Shen <shenjian15@huawei.com>
Signed-off-by: default avatarHao Lan <lanhao@huawei.com>
parent 9ebeea0c

drivers/net/ethernet/hisilicon/hns3/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ hclgevf-objs = hns3vf/hclgevf_main.o hns3vf/hclgevf_mbx.o hns3vf/hclgevf_devlin 
hclgevf-$(CONFIG_HNS3_UBL) += hns3_common/hclge_comm_unic_addr.o hns3vf/hclgevf_unic_ip.o hns3vf/hclgevf_unic_guid.o \

				hns3vf/hclgevf_unic_addr.o

hclgevf-$(CONFIG_UB_UDMA_HNS3) += hns3vf/hclgevf_udma.o

hclgevf-$(CONFIG_HNS3_DCB) += hns3vf/hclgevf_dcb.o



obj-$(CONFIG_HNS3_HCLGE) += hclge.o

hclge-objs = hns3pf/hclge_main.o hns3pf/hclge_mdio.o hns3pf/hclge_tm.o hns3pf/hclge_sysfs.o hns3pf/hclge_regs.o \

drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h

+11 −1
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 
#include <linux/mutex.h>

#include <linux/types.h>



#include "hnae3.h"



enum HCLGE_MBX_OPCODE {

	HCLGE_MBX_RESET = 0x01,		/* (VF -> PF) assert reset */

	HCLGE_MBX_ASSERTING_RESET,	/* (PF -> VF) PF is asserting reset */
@@ -49,6 +51,7 @@ enum HCLGE_MBX_OPCODE { 
	HCLGE_MBX_GET_RING_VECTOR_MAP,	/* (VF -> PF) get ring-to-vector map */

	HCLGE_MBX_SET_QB = 0x28,        /* (VF -> PF) set queue bonding */

	HCLGE_MBX_PUSH_QB_STATE,        /* (PF -> VF) push qb state */

	HCLGE_MBX_SET_TC = 0x30,        /* (VF -> PF) set tc */



	HCLGE_MBX_SET_MGUID = 0x50,	/* (VF -> PF) set mc guid */

	HCLGE_UNIC_MBX_SET_IP,		/* (VF -> PF) set ip addr */
@@ -115,7 +118,7 @@ struct hclge_ring_chain_param { 


struct hclge_basic_info {

	u8 hw_tc_map;

	u8 rsv;

	u8 tc_max;

	__le16 mbx_api_version;

	__le32 pf_caps;

};
@@ -243,6 +246,13 @@ struct hclge_mbx_mtu_info { 
	__le32 mtu;

};



struct hclge_mbx_tc_info {

	__le32 prio_tc_map;

	u8 tc_dwrr[HNAE3_MAX_TC];

	u8 num_tc;

	u8 tc_sch_mode; /* 0: sp; 1: dwrr */

};



#pragma pack()



/* used by VF to store the received Async responses from PF */

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+5 −0
Original line number Diff line number Diff line
@@ -142,6 +142,7 @@ enum HNAE3_DEV_CAP_BITS { 
	HNAE3_DEV_SUPPORT_TM_FLUSH_B,

	HNAE3_DEV_SUPPORT_VF_FAULT_B,

	HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B,

	HNAE3_DEV_SUPPORT_VF_MULTI_TCS_B,

};



#define hnae3_ae_dev_fd_supported(ae_dev) \
@@ -222,8 +223,12 @@ enum HNAE3_DEV_CAP_BITS { 
#define hnae3_ae_dev_gen_reg_dfx_supported(hdev) \

	test_bit(HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B, (hdev)->ae_dev->caps)



#define hnae3_ae_dev_vf_multi_tcs_supported(hdev) \

	test_bit(HNAE3_DEV_SUPPORT_VF_MULTI_TCS_B, (hdev)->ae_dev->caps)



enum HNAE3_PF_CAP_BITS {

	HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,

	HNAE3_PF_SUPPORT_VF_MULTI_TCS_B = 1,

};

#define ring_ptr_move_fw(ring, p) \

	((ring)->p = ((ring)->p + 1) % (ring)->desc_num)

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c

+2 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_TM_FLUSH_B, HNAE3_DEV_SUPPORT_TM_FLUSH_B},

	{HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B},

	{HCLGE_COMM_CAP_ERR_MOD_GEN_REG_B, HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B},

	{HCLGE_COMM_CAP_VF_MULTI_TCS, HNAE3_DEV_SUPPORT_VF_MULTI_TCS_B},

};



static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = {
@@ -172,6 +173,7 @@ static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_RXD_ADV_LAYOUT_B, HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B},

	{HCLGE_COMM_CAP_CQ_B, HNAE3_DEV_SUPPORT_CQ_B},

	{HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B},

	{HCLGE_COMM_CAP_VF_MULTI_TCS, HNAE3_DEV_SUPPORT_VF_MULTI_TCS_B},

};



static void

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -366,6 +366,7 @@ enum HCLGE_COMM_CAP_BITS { 
	HCLGE_COMM_CAP_NOTIFY_PKT_B = 29,

	HCLGE_COMM_CAP_TM_FLUSH_B = 31,

	HCLGE_COMM_CAP_ERR_MOD_GEN_REG_B = 32,

	HCLGE_COMM_CAP_VF_MULTI_TCS = 34,

};



enum HCLGE_COMM_API_CAP_BITS {