Commit 515d5c8a authored by Mark Rutland's avatar Mark Rutland Committed by Catalin Marinas
Browse files

arm64: add C wrappers for SET_PSTATE_*() 



To make callsites easier to read, add trivial C wrappers for the
SET_PSTATE_*() helpers, and convert trivial uses over to these. The new
wrappers will be used further in subsequent patches.

There should be no functional change as a result of this patch.

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20201113124937.20574-3-mark.rutland@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent f80d0340

arch/arm64/include/asm/sysreg.h

+4 −0
Original line number Diff line number Diff line
@@ -98,6 +98,10 @@ 
#define SET_PSTATE_SSBS(x)		__emit_inst(0xd500401f | PSTATE_SSBS | ((!!x) << PSTATE_Imm_shift))

#define SET_PSTATE_TCO(x)		__emit_inst(0xd500401f | PSTATE_TCO | ((!!x) << PSTATE_Imm_shift))



#define set_pstate_pan(x)		asm volatile(SET_PSTATE_PAN(x))

#define set_pstate_uao(x)		asm volatile(SET_PSTATE_UAO(x))

#define set_pstate_ssbs(x)		asm volatile(SET_PSTATE_SSBS(x))



#define __SYS_BARRIER_INSN(CRm, op2, Rt) \

	__emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))

arch/arm64/kernel/cpufeature.c

+1 −1
Original line number Diff line number Diff line
@@ -1598,7 +1598,7 @@ static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) 
	WARN_ON_ONCE(in_interrupt());



	sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0);

	asm(SET_PSTATE_PAN(1));

	set_pstate_pan(1);

}

#endif /* CONFIG_ARM64_PAN */

arch/arm64/kernel/proton-pack.c

+2 −2
Original line number Diff line number Diff line
@@ -538,12 +538,12 @@ static enum mitigation_state spectre_v4_enable_hw_mitigation(void) 


	if (spectre_v4_mitigations_off()) {

		sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_DSSBS);

		asm volatile(SET_PSTATE_SSBS(1));

		set_pstate_ssbs(1);

		return SPECTRE_VULNERABLE;

	}



	/* SCTLR_EL1.DSSBS was initialised to 0 during boot */

	asm volatile(SET_PSTATE_SSBS(0));

	set_pstate_ssbs(0);

	return SPECTRE_MITIGATED;

}