Commit 51595e3b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull more arm64 updates from Catalin Marinas:
 "A mix of fixes and clean-ups that turned up too late for the first
  pull request:

   - Restore terminal stack frame records. Their previous removal caused
     traces which cross secondary_start_kernel to terminate one entry
     too late, with a spurious "0" entry.

   - Fix boot warning with pseudo-NMI due to the way we manipulate the
     PMR register.

   - ACPI fixes: avoid corruption of interrupt mappings on watchdog
     probe failure (GTDT), prevent unregistering of GIC SGIs.

   - Force SPARSEMEM_VMEMMAP as the only memory model, it saves with
     having to test all the other combinations.

   - Documentation fixes and updates: tagged address ABI exceptions on
     brk/mmap/mremap(), event stream frequency, update booting
     requirements on the configuration of traps"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: kernel: Update the stale comment
  arm64: Fix the documented event stream frequency
  arm64: entry: always set GIC_PRIO_PSR_I_SET during entry
  arm64: Explicitly document boot requirements for SVE
  arm64: Explicitly require that FPSIMD instructions do not trap
  arm64: Relax booting requirements for configuration of traps
  arm64: cpufeatures: use min and max
  arm64: stacktrace: restore terminal records
  arm64/vdso: Discard .note.gnu.property sections in vDSO
  arm64: doc: Add brk/mmap/mremap() to the Tagged Address ABI Exceptions
  psci: Remove unneeded semicolon
  ACPI: irq: Prevent unregistering of GIC SGIs
  ACPI: GTDT: Don't corrupt interrupt mappings on watchdow probe failure
  arm64: Show three registers per line
  arm64: remove HAVE_DEBUG_BUGVERBOSE
  arm64: alternative: simplify passing alt_region
  arm64: Force SPARSEMEM_VMEMMAP as the only memory management model
  arm64: vdso32: drop -no-integrated-as flag
parents 2059c40a c76fba33

Documentation/arm64/booting.rst

+32 −1
Original line number Diff line number Diff line
@@ -277,9 +277,40 @@ Before jumping into the kernel, the following conditions must be met: 


    - SCR_EL3.FGTEn (bit 27) must be initialised to 0b1.



  For CPUs with Advanced SIMD and floating point support:



  - If EL3 is present:



    - CPTR_EL3.TFP (bit 10) must be initialised to 0b0.



  - If EL2 is present and the kernel is entered at EL1:



    - CPTR_EL2.TFP (bit 10) must be initialised to 0b0.



  For CPUs with the Scalable Vector Extension (FEAT_SVE) present:



  - if EL3 is present:



    - CPTR_EL3.EZ (bit 8) must be initialised to 0b1.



    - ZCR_EL3.LEN must be initialised to the same value for all CPUs the

      kernel is executed on.



  - If the kernel is entered at EL1 and EL2 is present:



    - CPTR_EL2.TZ (bit 8) must be initialised to 0b0.



    - CPTR_EL2.ZEN (bits 17:16) must be initialised to 0b11.



    - ZCR_EL2.LEN must be initialised to the same value for all CPUs the

      kernel will execute on.



The requirements described above for CPU mode, caches, MMUs, architected

timers, coherency and system registers apply to all CPUs.  All CPUs must

enter the kernel in the same exception level.

enter the kernel in the same exception level.  Where the values documented

disable traps it is permissible for these traps to be enabled so long as

those traps are handled transparently by higher exception levels as though

the values documented were set.



The boot loader is expected to enter the kernel on each CPU in the

following manner:

Documentation/arm64/elf_hwcaps.rst

+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ HWCAP_ASIMD 


HWCAP_EVTSTRM

    The generic timer is configured to generate events at a frequency of

    approximately 100KHz.

    approximately 10KHz.



HWCAP_AES

    Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.

Documentation/arm64/tagged-address-abi.rst

+6 −0
Original line number Diff line number Diff line
@@ -113,6 +113,12 @@ ABI relaxation: 


- ``shmat()`` and ``shmdt()``.



- ``brk()`` (since kernel v5.6).



- ``mmap()`` (since kernel v5.6).



- ``mremap()``, the ``new_address`` argument (since kernel v5.6).



Any attempt to use non-zero tagged pointers may result in an error code

being returned, a (fatal) signal being raised, or other modes of

failure.

arch/arm64/Kconfig

+1 −10
Original line number Diff line number Diff line
@@ -170,7 +170,6 @@ config ARM64 
	select HAVE_CMPXCHG_DOUBLE

	select HAVE_CMPXCHG_LOCAL

	select HAVE_CONTEXT_TRACKING

	select HAVE_DEBUG_BUGVERBOSE

	select HAVE_DEBUG_KMEMLEAK

	select HAVE_DMA_CONTIGUOUS

	select HAVE_DYNAMIC_FTRACE
@@ -1061,15 +1060,7 @@ source "kernel/Kconfig.hz" 
config ARCH_SPARSEMEM_ENABLE

	def_bool y

	select SPARSEMEM_VMEMMAP_ENABLE



config ARCH_SPARSEMEM_DEFAULT

	def_bool ARCH_SPARSEMEM_ENABLE



config ARCH_SELECT_MEMORY_MODEL

	def_bool ARCH_SPARSEMEM_ENABLE



config ARCH_FLATMEM_ENABLE

	def_bool !NUMA

	select SPARSEMEM_VMEMMAP



config HW_PERF_EVENTS

	def_bool y

arch/arm64/include/asm/daifflags.h

+3 −0
Original line number Diff line number Diff line
@@ -131,6 +131,9 @@ static inline void local_daif_inherit(struct pt_regs *regs) 
	if (interrupts_enabled(regs))

		trace_hardirqs_on();



	if (system_uses_irq_prio_masking())

		gic_write_pmr(regs->pmr_save);



	/*

	 * We can't use local_daif_restore(regs->pstate) here as

	 * system_has_prio_mask_debugging() won't restore the I bit if it can