Commit 50904e9b authored by Hans de Goede's avatar Hans de Goede Committed by Lee Jones
Browse files

mfd: intel_soc_pmic_crc: Add crystal_cove_charger cell to BYT cells 



The Crystal Cove PMIC has a pin which can be used to connect the IRQ of
an external charger IC. On some boards this is used and we need to have
a cell for this, with a driver which creates its own irqchip with
a single IRQ for the charger driver to consume.

The charger driver cannot directly consume the IRQ from the MFD level
irqchip because the PMIC has 2 levels of interrupts and the second
level interrupt status register, which is handled by the cell drivers,
needs to have the IRQ acked to avoid an IRQ storm.

Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211225115509.94891-3-hdegoede@redhat.com
parent 4946d58d

drivers/mfd/intel_soc_pmic_crc.c

+9 −0
Original line number Diff line number Diff line
@@ -44,6 +44,10 @@ static const struct resource adc_resources[] = { 
	DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_ADC, "ADC"),

};



static const struct resource charger_resources[] = {

	DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_CHGR, "CHGR"),

};



static const struct resource gpio_resources[] = {

	DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_GPIO, "GPIO"),

};
@@ -69,6 +73,11 @@ static struct mfd_cell crystal_cove_byt_dev[] = { 
		.num_resources = ARRAY_SIZE(adc_resources),

		.resources = adc_resources,

	},

	{

		.name = "crystal_cove_charger",

		.num_resources = ARRAY_SIZE(charger_resources),

		.resources = charger_resources,

	},

	{

		.name = "crystal_cove_gpio",

		.num_resources = ARRAY_SIZE(gpio_resources),