Commit 506ad56a authored by Takashi Sakamoto's avatar Takashi Sakamoto Committed by Takashi Iwai
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ALSA: firewire-motu: refactoring protocol v2 for fetching mode switch



This commit splits the method to switch fetching mode for protocol
version 2 so that model-dependent operations are explicitly defined.

Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20200519111641.123211-15-o-takashi@sakamocchi.jp


Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 7b47c0d7
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+47 −30
Original line number Diff line number Diff line
@@ -170,52 +170,69 @@ int snd_motu_protocol_v2_get_clock_source(struct snd_motu *motu,
	return get_clock_source(motu, be32_to_cpu(reg), src);
}

int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu,
// Expected for Traveler and 896HD, which implements Altera Cyclone EP1C3.
static int switch_fetching_mode_cyclone(struct snd_motu *motu, u32 *data,
					bool enable)
{
	enum snd_motu_clock_source src;
	__be32 reg;
	u32 data;
	int err = 0;
	*data |= V2_CLOCK_MODEL_SPECIFIC;

	// 828mkII implements Altera ACEX 1K EP1K30. Nothing to do.
	if (motu->spec == &snd_motu_spec_828mk2)
	return 0;
}

	err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
					sizeof(reg));
// For UltraLite and 8pre, which implements Xilinx Spartan XC3S200.
static int switch_fetching_mode_spartan(struct snd_motu *motu, u32 *data,
					bool enable)
{
	unsigned int rate;
	enum snd_motu_clock_source src;
	int err;

	err = get_clock_source(motu, *data, &src);
	if (err < 0)
		return err;
	data = be32_to_cpu(reg);

	err = get_clock_source(motu, data, &src);
	err = get_clock_rate(*data, &rate);
	if (err < 0)
		return err;

	data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC);
	if (enable)
		data |= V2_CLOCK_FETCH_ENABLE;
	if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000)
		*data |= V2_CLOCK_MODEL_SPECIFIC;

	return 0;
}

	if (motu->spec == &snd_motu_spec_traveler) {
		// Expected for Traveler and 896HD, which implements Altera
		// Cyclone EP1C3.
		data |= V2_CLOCK_MODEL_SPECIFIC;
int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu,
					      bool enable)
{
	if (motu->spec == &snd_motu_spec_828mk2) {
		// 828mkII implements Altera ACEX 1K EP1K30. Nothing to do.
		return 0;
	} else {
		// For UltraLite and 8pre, which implements Xilinx Spartan
		// XC3S200.
		unsigned int rate;
		__be32 reg;
		u32 data;
		int err;

		err = get_clock_rate(data, &rate);
		err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET,
						&reg, sizeof(reg));
		if (err < 0)
			return err;
		data = be32_to_cpu(reg);

		if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000)
			data |= V2_CLOCK_MODEL_SPECIFIC;
	}
		data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC);
		if (enable)
			data |= V2_CLOCK_FETCH_ENABLE;

		if (motu->spec == &snd_motu_spec_traveler)
			err = switch_fetching_mode_cyclone(motu, &data, enable);
		else
			err = switch_fetching_mode_spartan(motu, &data, enable);
		if (err < 0)
			return err;

		reg = cpu_to_be32(data);
	return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, &reg,
					  sizeof(reg));
		return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET,
						  &reg, sizeof(reg));
	}
}

static int detect_packet_formats_828mk2(struct snd_motu *motu, u32 data)