Commit 505fb254 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Vinod Koul
Browse files

dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml 



Migrate legacy bindings (described in qcom,ipq8074-qmp-pcie-phy.yaml)
to qcom,sc8280xp-qmp-pcie-phy.yaml. This removes a need to declare
the child PHY node or split resource regions.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230820142035.89903-2-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 9f266c1c

Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml

+35 −243
Original line number Diff line number Diff line
@@ -13,77 +13,33 @@ description: 
  QMP PHY controller supports physical layer functionality for a number of

  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.



  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see

  qcom,sc8280xp-qmp-pcie-phy.yaml.



properties:

  compatible:

    enum:

      - qcom,ipq6018-qmp-pcie-phy

      - qcom,ipq8074-qmp-gen3-pcie-phy

      - qcom,ipq8074-qmp-pcie-phy

      - qcom,msm8998-qmp-pcie-phy

      - qcom,sc8180x-qmp-pcie-phy

      - qcom,sdm845-qhp-pcie-phy

      - qcom,sdm845-qmp-pcie-phy

      - qcom,sdx55-qmp-pcie-phy

      - qcom,sm8250-qmp-gen3x1-pcie-phy

      - qcom,sm8250-qmp-gen3x2-pcie-phy

      - qcom,sm8250-qmp-modem-pcie-phy

      - qcom,sm8450-qmp-gen3x1-pcie-phy

      - qcom,sm8450-qmp-gen4x2-pcie-phy



  reg:

    items:

      - description: serdes



  "#address-cells":

    enum: [ 1, 2 ]



  "#size-cells":

    enum: [ 1, 2 ]



  ranges: true



  clocks:

    minItems: 2

    maxItems: 4

    maxItems: 3



  clock-names:

    minItems: 2

    maxItems: 4

    items:

      - const: aux

      - const: cfg_ahb

      - const: pipe



  resets:

    minItems: 1

    maxItems: 2



  reset-names:

    minItems: 1

    maxItems: 2



  vdda-phy-supply: true



  vdda-pll-supply: true



  vddp-ref-clk-supply: true



patternProperties:

  "^phy@[0-9a-f]+$":

    type: object

    description: single PHY-provider child node

    properties:

      reg:

        minItems: 3

        maxItems: 6



      clocks:

    items:

          - description: PIPE clock



      clock-names:

        deprecated: true

        items:

          - const: pipe0

      - const: phy

      - const: common



  "#clock-cells":

    const: 0
@@ -94,206 +50,42 @@ patternProperties: 
  "#phy-cells":

    const: 0



    required:

      - reg

      - clocks

      - "#clock-cells"

      - clock-output-names

      - "#phy-cells"



    additionalProperties: false



required:

  - compatible

  - reg

  - "#address-cells"

  - "#size-cells"

  - ranges

  - clocks

  - clock-names

  - resets

  - reset-names

  - "#clock-cells"

  - clock-output-names

  - "#phy-cells"



additionalProperties: false



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,msm8998-qmp-pcie-phy

    then:

      properties:

        clocks:

          maxItems: 3

        clock-names:

          items:

            - const: aux

            - const: cfg_ahb

            - const: ref

        resets:

          maxItems: 2

        reset-names:

          items:

            - const: phy

            - const: common

      required:

        - vdda-phy-supply

        - vdda-pll-supply



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,ipq6018-qmp-pcie-phy

              - qcom,ipq8074-qmp-gen3-pcie-phy

              - qcom,ipq8074-qmp-pcie-phy

    then:

      properties:

        clocks:

          maxItems: 2

        clock-names:

          items:

            - const: aux

            - const: cfg_ahb

        resets:

          maxItems: 2

        reset-names:

          items:

            - const: phy

            - const: common



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc8180x-qmp-pcie-phy

              - qcom,sdm845-qhp-pcie-phy

              - qcom,sdm845-qmp-pcie-phy

              - qcom,sdx55-qmp-pcie-phy

              - qcom,sm8250-qmp-gen3x1-pcie-phy

              - qcom,sm8250-qmp-gen3x2-pcie-phy

              - qcom,sm8250-qmp-modem-pcie-phy

              - qcom,sm8450-qmp-gen3x1-pcie-phy

              - qcom,sm8450-qmp-gen4x2-pcie-phy

    then:

      properties:

        clocks:

          maxItems: 4

        clock-names:

          items:

            - const: aux

            - const: cfg_ahb

            - const: ref

            - const: refgen

        resets:

          maxItems: 1

        reset-names:

          items:

            - const: phy

      required:

        - vdda-phy-supply

        - vdda-pll-supply



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc8180x-qmp-pcie-phy

              - qcom,sm8250-qmp-gen3x2-pcie-phy

              - qcom,sm8250-qmp-modem-pcie-phy

              - qcom,sm8450-qmp-gen4x2-pcie-phy

    then:

      patternProperties:

        "^phy@[0-9a-f]+$":

          properties:

            reg:

              items:

                - description: TX lane 1

                - description: RX lane 1

                - description: PCS

                - description: TX lane 2

                - description: RX lane 2

                - description: PCS_MISC



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sdm845-qmp-pcie-phy

              - qcom,sdx55-qmp-pcie-phy

              - qcom,sm8250-qmp-gen3x1-pcie-phy

              - qcom,sm8450-qmp-gen3x1-pcie-phy

    then:

      patternProperties:

        "^phy@[0-9a-f]+$":

          properties:

            reg:

              items:

                - description: TX

                - description: RX

                - description: PCS

                - description: PCS_MISC



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,ipq6018-qmp-pcie-phy

              - qcom,ipq8074-qmp-pcie-phy

              - qcom,msm8998-qmp-pcie-phy

              - qcom,sdm845-qhp-pcie-phy

    then:

      patternProperties:

        "^phy@[0-9a-f]+$":

          properties:

            reg:

              items:

                - description: TX

                - description: RX

                - description: PCS



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-sm8250.h>

    phy-wrapper@1c0e000 {

        compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";

        reg = <0x01c0e000 0x1c0>;

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0x0 0x01c0e000 0x1000>;



        clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,

                 <&gcc GCC_PCIE_1_CFG_AHB_CLK>,

                 <&gcc GCC_PCIE_WIGIG_CLKREF_EN>,

                 <&gcc GCC_PCIE1_PHY_REFGEN_CLK>;

        clock-names = "aux", "cfg_ahb", "ref", "refgen";



        resets = <&gcc GCC_PCIE_1_PHY_BCR>;

        reset-names = "phy";

    #include <dt-bindings/clock/qcom,gcc-ipq6018.h>

    #include <dt-bindings/reset/qcom,gcc-ipq6018.h>



        vdda-phy-supply = <&vreg_l10c_0p88>;

        vdda-pll-supply = <&vreg_l6b_1p2>;

    phy@84000 {

        compatible = "qcom,ipq6018-qmp-pcie-phy";

        reg = <0x0 0x00084000 0x0 0x1000>;



        phy@200 {

            reg = <0x200 0x170>,

                  <0x400 0x200>,

                  <0xa00 0x1f0>,

                  <0x600 0x170>,

                  <0x800 0x200>,

                  <0xe00 0xf4>;



            clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;

        clocks = <&gcc GCC_PCIE0_AUX_CLK>,

                 <&gcc GCC_PCIE0_AHB_CLK>,

                 <&gcc GCC_PCIE0_PIPE_CLK>;

        clock-names = "aux",

                      "cfg_ahb",

                      "pipe";



        clock-output-names = "gcc_pcie0_pipe_clk_src";

        #clock-cells = <0>;

            clock-output-names = "pcie_1_pipe_clk";



        #phy-cells = <0>;

        };



        resets = <&gcc GCC_PCIE0_PHY_BCR>,

                 <&gcc GCC_PCIE0PHY_PHY_BCR>;

        reset-names = "phy",

                      "common";

    };

Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml

0 → 100644
+97 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-pcie-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm QMP PHY controller (PCIe, MSM8998)



maintainers:

  - Vinod Koul <vkoul@kernel.org>



description:

  The QMP PHY controller supports physical layer functionality for a number of

  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.



properties:

  compatible:

    const: qcom,msm8998-qmp-pcie-phy



  reg:

    items:

      - description: serdes



  clocks:

    maxItems: 4



  clock-names:

    items:

      - const: aux

      - const: cfg_ahb

      - const: ref

      - const: pipe



  resets:

    maxItems: 2



  reset-names:

    items:

      - const: phy

      - const: common



  vdda-phy-supply: true



  vdda-pll-supply: true



  "#clock-cells":

    const: 0



  clock-output-names:

    maxItems: 1



  "#phy-cells":

    const: 0



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - resets

  - reset-names

  - vdda-phy-supply

  - vdda-pll-supply

  - "#clock-cells"

  - clock-output-names

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-msm8998.h>



    phy@1c18000 {

        compatible = "qcom,msm8998-qmp-pcie-phy";

        reg = <0x01c06000 0x1000>;



        clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,

                 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,

                 <&gcc GCC_PCIE_CLKREF_CLK>,

                 <&gcc GCC_PCIE_0_PIPE_CLK>;

        clock-names = "aux",

                      "cfg_ahb",

                      "ref",

                      "pipe";



        clock-output-names = "pcie_0_pipe_clk_src";

        #clock-cells = <0>;



        #phy-cells = <0>;



        resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;

        reset-names = "phy", "common";



        vdda-phy-supply = <&vreg_l1a_0p875>;

        vdda-pll-supply = <&vreg_l2a_1p2>;

    };

Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml

+29 −3
Original line number Diff line number Diff line
@@ -18,11 +18,20 @@ properties: 
    enum:

      - qcom,sa8775p-qmp-gen4x2-pcie-phy

      - qcom,sa8775p-qmp-gen4x4-pcie-phy

      - qcom,sc8180x-qmp-pcie-phy

      - qcom,sc8280xp-qmp-gen3x1-pcie-phy

      - qcom,sc8280xp-qmp-gen3x2-pcie-phy

      - qcom,sc8280xp-qmp-gen3x4-pcie-phy

      - qcom,sdm845-qhp-pcie-phy

      - qcom,sdm845-qmp-pcie-phy

      - qcom,sdx55-qmp-pcie-phy

      - qcom,sdx65-qmp-gen4x2-pcie-phy

      - qcom,sm8250-qmp-gen3x1-pcie-phy

      - qcom,sm8250-qmp-gen3x2-pcie-phy

      - qcom,sm8250-qmp-modem-pcie-phy

      - qcom,sm8350-qmp-gen3x1-pcie-phy

      - qcom,sm8450-qmp-gen3x1-pcie-phy

      - qcom,sm8450-qmp-gen4x2-pcie-phy

      - qcom,sm8550-qmp-gen3x2-pcie-phy

      - qcom,sm8550-qmp-gen4x2-pcie-phy
@@ -40,7 +49,7 @@ properties: 
      - const: aux

      - const: cfg_ahb

      - const: ref

      - const: rchng

      - enum: [rchng, refgen]

      - const: pipe

      - const: pipediv2

      - const: phy_aux
@@ -87,7 +96,6 @@ required: 
  - reg

  - clocks

  - clock-names

  - power-domains

  - resets

  - reset-names

  - vdda-phy-supply
@@ -123,7 +131,16 @@ allOf: 
        compatible:

          contains:

            enum:

              - qcom,sc8180x-qmp-pcie-phy

              - qcom,sdm845-qhp-pcie-phy

              - qcom,sdm845-qmp-pcie-phy

              - qcom,sdx55-qmp-pcie-phy

              - qcom,sm8250-qmp-gen3x1-pcie-phy

              - qcom,sm8250-qmp-gen3x2-pcie-phy

              - qcom,sm8250-qmp-modem-pcie-phy

              - qcom,sm8350-qmp-gen3x1-pcie-phy

              - qcom,sm8450-qmp-gen3x1-pcie-phy

              - qcom,sm8450-qmp-gen3x2-pcie-phy

              - qcom,sm8550-qmp-gen3x2-pcie-phy

              - qcom,sm8550-qmp-gen4x2-pcie-phy

    then:
@@ -132,7 +149,16 @@ allOf: 
          maxItems: 5

        clock-names:

          maxItems: 5

    else:



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc8280xp-qmp-gen3x1-pcie-phy

              - qcom,sc8280xp-qmp-gen3x2-pcie-phy

              - qcom,sc8280xp-qmp-gen3x4-pcie-phy

    then:

      properties:

        clocks:

          minItems: 6