Commit 502c65af authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'dpaa2-add-1000base-x-support' 

Russell King says:

====================
dpaa2: add 1000base-X support

This patch series adds 1000base-X support to pcs-lynx and DPAA2,
allowing runtime switching between SGMII and 1000base-X. This is
a pre-requisit for SFP module support on the SolidRun ComExpress 7.

v2: updated with Ioana's r-b's, and comment on backplane support
====================

Link: https://lore.kernel.org/r/20210205103859.GH1463@shell.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 8cc8993c 085f1776

drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h

+3 −1
Original line number Diff line number Diff line
@@ -695,7 +695,9 @@ static inline unsigned int dpaa2_eth_rx_head_room(struct dpaa2_eth_priv *priv) 


static inline bool dpaa2_eth_is_type_phy(struct dpaa2_eth_priv *priv)

{

	if (priv->mac && priv->mac->attr.link_type == DPMAC_LINK_TYPE_PHY)

	if (priv->mac &&

	    (priv->mac->attr.link_type == DPMAC_LINK_TYPE_PHY ||

	     priv->mac->attr.link_type == DPMAC_LINK_TYPE_BACKPLANE))

		return true;



	return false;

drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c

+20 −5
Original line number Diff line number Diff line
@@ -79,10 +79,20 @@ static bool dpaa2_mac_phy_mode_mismatch(struct dpaa2_mac *mac, 
					phy_interface_t interface)

{

	switch (interface) {

	/* We can switch between SGMII and 1000BASE-X at runtime with

	 * pcs-lynx

	 */

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_1000BASEX:

		if (mac->pcs &&

		    (mac->if_mode == PHY_INTERFACE_MODE_SGMII ||

		     mac->if_mode == PHY_INTERFACE_MODE_1000BASEX))

			return false;

		return interface != mac->if_mode;



	case PHY_INTERFACE_MODE_10GBASER:

	case PHY_INTERFACE_MODE_USXGMII:

	case PHY_INTERFACE_MODE_QSGMII:

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_RGMII:

	case PHY_INTERFACE_MODE_RGMII_ID:

	case PHY_INTERFACE_MODE_RGMII_RXID:
@@ -122,13 +132,17 @@ static void dpaa2_mac_validate(struct phylink_config *config, 
		fallthrough;

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_QSGMII:

	case PHY_INTERFACE_MODE_1000BASEX:

	case PHY_INTERFACE_MODE_RGMII:

	case PHY_INTERFACE_MODE_RGMII_ID:

	case PHY_INTERFACE_MODE_RGMII_RXID:

	case PHY_INTERFACE_MODE_RGMII_TXID:

		phylink_set(mask, 10baseT_Full);

		phylink_set(mask, 100baseT_Full);

		phylink_set(mask, 1000baseX_Full);

		phylink_set(mask, 1000baseT_Full);

		if (state->interface == PHY_INTERFACE_MODE_1000BASEX)

			break;

		phylink_set(mask, 100baseT_Full);

		phylink_set(mask, 10baseT_Full);

		break;

	default:

		goto empty_set;
@@ -301,8 +315,9 @@ int dpaa2_mac_connect(struct dpaa2_mac *mac) 
		goto err_put_node;

	}



	if (mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&

	    mac->attr.eth_if != DPMAC_ETH_IF_RGMII) {

	if ((mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&

	     mac->attr.eth_if != DPMAC_ETH_IF_RGMII) ||

	    mac->attr.link_type == DPMAC_LINK_TYPE_BACKPLANE) {

		err = dpaa2_pcs_create(mac, dpmac_node, mac->attr.id);

		if (err)

			goto err_put_node;

drivers/net/pcs/pcs-lynx.c

+36 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#define LINK_TIMER_VAL(ns)		((u32)((ns) / SGMII_CLOCK_PERIOD_NS))



#define SGMII_AN_LINK_TIMER_NS		1600000 /* defined by SGMII spec */

#define IEEE8023_LINK_TIMER_NS		10000000



#define LINK_TIMER_LO			0x12

#define LINK_TIMER_HI			0x13
@@ -83,6 +84,7 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs, 
	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);



	switch (state->interface) {

	case PHY_INTERFACE_MODE_1000BASEX:

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_QSGMII:

		phylink_mii_c22_pcs_get_state(lynx->mdio, state);
@@ -108,6 +110,30 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs, 
		state->link, state->an_enabled, state->an_complete);

}



static int lynx_pcs_config_1000basex(struct mdio_device *pcs,

				     unsigned int mode,

				     const unsigned long *advertising)

{

	struct mii_bus *bus = pcs->bus;

	int addr = pcs->addr;

	u32 link_timer;

	int err;



	link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS);

	mdiobus_write(bus, addr, LINK_TIMER_LO, link_timer & 0xffff);

	mdiobus_write(bus, addr, LINK_TIMER_HI, link_timer >> 16);



	err = mdiobus_modify(bus, addr, IF_MODE,

			     IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN,

			     0);

	if (err)

		return err;



	return phylink_mii_c22_pcs_config(pcs, mode,

					  PHY_INTERFACE_MODE_1000BASEX,

					  advertising);

}



static int lynx_pcs_config_sgmii(struct mdio_device *pcs, unsigned int mode,

				 const unsigned long *advertising)

{
@@ -163,6 +189,8 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode, 
	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);



	switch (ifmode) {

	case PHY_INTERFACE_MODE_1000BASEX:

		return lynx_pcs_config_1000basex(lynx->mdio, mode, advertising);

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_QSGMII:

		return lynx_pcs_config_sgmii(lynx->mdio, mode, advertising);
@@ -185,6 +213,13 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode, 
	return 0;

}



static void lynx_pcs_an_restart(struct phylink_pcs *pcs)

{

	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);



	phylink_mii_c22_pcs_an_restart(lynx->mdio);

}



static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode,

				   int speed, int duplex)

{
@@ -290,6 +325,7 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, 
static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {

	.pcs_get_state = lynx_pcs_get_state,

	.pcs_config = lynx_pcs_config,

	.pcs_an_restart = lynx_pcs_an_restart,

	.pcs_link_up = lynx_pcs_link_up,

};