Loading drivers/iommu/amd_iommu.c +10 −8 Original line number Diff line number Diff line Loading @@ -605,7 +605,9 @@ static void build_inv_all(struct iommu_cmd *cmd) * Writes the command to the IOMMUs command buffer and informs the * hardware about the new command. */ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) static int iommu_queue_command_sync(struct amd_iommu *iommu, struct iommu_cmd *cmd, bool sync) { u32 left, tail, head, next_tail; unsigned long flags; Loading Loading @@ -639,13 +641,18 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) copy_cmd_to_buffer(iommu, cmd, tail); /* We need to sync now to make sure all commands are processed */ iommu->need_sync = true; iommu->need_sync = sync; spin_unlock_irqrestore(&iommu->lock, flags); return 0; } static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) { return iommu_queue_command_sync(iommu, cmd, true); } /* * This function queues a completion wait command into the command * buffer of an IOMMU Loading @@ -661,7 +668,7 @@ static int iommu_completion_wait(struct amd_iommu *iommu) build_completion_wait(&cmd, (u64)&sem); ret = iommu_queue_command(iommu, &cmd); ret = iommu_queue_command_sync(iommu, &cmd, false); if (ret) return ret; Loading Loading @@ -840,14 +847,9 @@ static void domain_flush_complete(struct protection_domain *domain) static void domain_flush_devices(struct protection_domain *domain) { struct iommu_dev_data *dev_data; unsigned long flags; spin_lock_irqsave(&domain->lock, flags); list_for_each_entry(dev_data, &domain->dev_list, list) device_flush_dte(dev_data); spin_unlock_irqrestore(&domain->lock, flags); } /**************************************************************************** Loading Loading
drivers/iommu/amd_iommu.c +10 −8 Original line number Diff line number Diff line Loading @@ -605,7 +605,9 @@ static void build_inv_all(struct iommu_cmd *cmd) * Writes the command to the IOMMUs command buffer and informs the * hardware about the new command. */ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) static int iommu_queue_command_sync(struct amd_iommu *iommu, struct iommu_cmd *cmd, bool sync) { u32 left, tail, head, next_tail; unsigned long flags; Loading Loading @@ -639,13 +641,18 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) copy_cmd_to_buffer(iommu, cmd, tail); /* We need to sync now to make sure all commands are processed */ iommu->need_sync = true; iommu->need_sync = sync; spin_unlock_irqrestore(&iommu->lock, flags); return 0; } static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) { return iommu_queue_command_sync(iommu, cmd, true); } /* * This function queues a completion wait command into the command * buffer of an IOMMU Loading @@ -661,7 +668,7 @@ static int iommu_completion_wait(struct amd_iommu *iommu) build_completion_wait(&cmd, (u64)&sem); ret = iommu_queue_command(iommu, &cmd); ret = iommu_queue_command_sync(iommu, &cmd, false); if (ret) return ret; Loading Loading @@ -840,14 +847,9 @@ static void domain_flush_complete(struct protection_domain *domain) static void domain_flush_devices(struct protection_domain *domain) { struct iommu_dev_data *dev_data; unsigned long flags; spin_lock_irqsave(&domain->lock, flags); list_for_each_entry(dev_data, &domain->dev_list, list) device_flush_dte(dev_data); spin_unlock_irqrestore(&domain->lock, flags); } /**************************************************************************** Loading