Commit 4f8ca13d authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Neil Armstrong
Browse files

ARM: dts: meson: Add the AIU audio controller



Add the AIU audio controller to the Amlogic Meson6/8/8b/8m2 SoC DT. This
provides I2S and SPDIF outputs as well as codec glues for the internal
HDMI controller.
Also add the clock inputs and pin mux definitions on Meson8/8b/8m2. On
Meson6 this is omitted because we neither have a clock nor pin
controller node there yet.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210717233030.331273-2-martin.blumenstingl@googlemail.com
parent 44cf630b
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+12 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/sound/meson-aiu.h>

/ {
	#address-cells = <1>;
@@ -36,6 +37,17 @@
				reg = <0x4000 0x400>;
			};

			aiu: audio-controller@5400 {
				compatible = "amlogic,aiu";
				#sound-dai-cells = <2>;
				sound-name-prefix = "AIU";
				reg = <0x5400 0x2ac>;
				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
				interrupt-names = "i2s", "spdif";
				status = "disabled";
			};

			assist: assist@7c00 {
				compatible = "amlogic,meson-mx-assist", "syscon";
				reg = <0x7c00 0x200>;
+63 −0
Original line number Diff line number Diff line
@@ -317,6 +317,29 @@
	};
}; /* end of / */

&aiu {
	compatible = "amlogic,aiu-meson8", "amlogic,aiu";
	clocks = <&clkc CLKID_AIU_GLUE>,
		 <&clkc CLKID_I2S_OUT>,
		 <&clkc CLKID_AOCLK_GATE>,
		 <&clkc CLKID_CTS_AMCLK>,
		 <&clkc CLKID_MIXER_IFACE>,
		 <&clkc CLKID_IEC958>,
		 <&clkc CLKID_IEC958_GATE>,
		 <&clkc CLKID_CTS_MCLK_I958>,
		 <&clkc CLKID_CTS_I958>;
	clock-names = "pclk",
		      "i2s_pclk",
		      "i2s_aoclk",
		      "i2s_mclk",
		      "i2s_mixer",
		      "spdif_pclk",
		      "spdif_aoclk",
		      "spdif_mclk",
		      "spdif_mclk_sel";
	resets = <&reset RESET_AIU>;
};

&aobus {
	pmu: pmu@e0 {
		compatible = "amlogic,meson8-pmu", "syscon";
@@ -340,6 +363,38 @@
			gpio-ranges = <&pinctrl_aobus 0 0 16>;
		};

		i2s_am_clk_pins: i2s-am-clk-out {
			mux {
				groups = "i2s_am_clk_out_ao";
				function = "i2s_ao";
				bias-disable;
			};
		};

		i2s_out_ao_clk_pins: i2s-ao-clk-out {
			mux {
				groups = "i2s_ao_clk_out_ao";
				function = "i2s_ao";
				bias-disable;
			};
		};

		i2s_out_lr_clk_pins: i2s-lr-clk-out {
			mux {
				groups = "i2s_lr_clk_out_ao";
				function = "i2s_ao";
				bias-disable;
			};
		};

		i2s_out_ch01_ao_pins: i2s-out-ch01 {
			mux {
				groups = "i2s_out_ch01_ao";
				function = "i2s_ao";
				bias-disable;
			};
		};

		uart_ao_a_pins: uart_ao_a {
			mux {
				groups = "uart_tx_ao_a", "uart_rx_ao_a";
@@ -460,6 +515,14 @@
			};
		};

		spdif_out_pins: spdif-out {
			mux {
				groups = "spdif_out";
				function = "spdif";
				bias-disable;
			};
		};

		spi_nor_pins: nor {
			mux {
				groups = "nor_d", "nor_q", "nor_c", "nor_cs";
+63 −0
Original line number Diff line number Diff line
@@ -279,6 +279,29 @@
	};
}; /* end of / */

&aiu {
	compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
	clocks = <&clkc CLKID_AIU_GLUE>,
		 <&clkc CLKID_I2S_OUT>,
		 <&clkc CLKID_AOCLK_GATE>,
		 <&clkc CLKID_CTS_AMCLK>,
		 <&clkc CLKID_MIXER_IFACE>,
		 <&clkc CLKID_IEC958>,
		 <&clkc CLKID_IEC958_GATE>,
		 <&clkc CLKID_CTS_MCLK_I958>,
		 <&clkc CLKID_CTS_I958>;
	clock-names = "pclk",
		      "i2s_pclk",
		      "i2s_aoclk",
		      "i2s_mclk",
		      "i2s_mixer",
		      "spdif_pclk",
		      "spdif_aoclk",
		      "spdif_mclk",
		      "spdif_mclk_sel";
	resets = <&reset RESET_AIU>;
};

&aobus {
	pmu: pmu@e0 {
		compatible = "amlogic,meson8b-pmu", "syscon";
@@ -302,6 +325,46 @@
			gpio-ranges = <&pinctrl_aobus 0 0 16>;
		};

		i2s_am_clk_pins: i2s-am-clk-out {
			mux {
				groups = "i2s_am_clk_out";
				function = "i2s";
				bias-disable;
			};
		};

		i2s_out_ao_clk_pins: i2s-ao-clk-out {
			mux {
				groups = "i2s_ao_clk_out";
				function = "i2s";
				bias-disable;
			};
		};

		i2s_out_lr_clk_pins: i2s-lr-clk-out {
			mux {
				groups = "i2s_lr_clk_out";
				function = "i2s";
				bias-disable;
			};
		};

		i2s_out_ch01_ao_pins: i2s-out-ch01 {
			mux {
				groups = "i2s_out_01";
				function = "i2s";
				bias-disable;
			};
		};

		spdif_out_1_pins: spdif-out-1 {
			mux {
				groups = "spdif_out_1";
				function = "spdif_1";
				bias-disable;
			};
		};

		uart_ao_a_pins: uart_ao_a {
			mux {
				groups = "uart_tx_ao_a", "uart_rx_ao_a";