Commit 4f8ad404 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.12-2021-02-18' of... 

Merge tag 'amd-drm-next-5.12-2021-02-18' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-next-5.12-2021-02-18:

amdgpu:
- Prefer Bhawan's unused variable fix
- Fixes for high priority queues on gfx8,9
- swSMU fixes for sienna cichlid
- swSMU fixes for renoir
- mmhub client id fixes for arcturus
- SMUIO fixes for navi family
- swSMU fixes for vangogh
- GPU reset cleanup
- Display fixes
- GFX harvesting fix for sienna cichlid
- Fix reference clock on Renoir
- Misc fixes and cleanups

amdkfd:
- Fix for unique id query
- Fix recursive lock warnings

radeon:
- Remove confusing VCE messages on Oland

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210218221531.3870-1-alexander.deucher@amd.com
parents ef23d500 6e80fb8a

drivers/gpu/drm/amd/amdgpu/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -171,7 +171,8 @@ amdgpu-y += \ 
# add SMUIO block

amdgpu-y += \

	smuio_v9_0.o \

	smuio_v11_0.o

	smuio_v11_0.o \

	smuio_v11_0_6.o



# add amdkfd interfaces

amdgpu-y += amdgpu_amdkfd.o

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+5 −2
Original line number Diff line number Diff line
@@ -287,7 +287,7 @@ enum amdgpu_kiq_irq { 


#define MAX_KIQ_REG_WAIT       5000 /* in usecs, 5ms */

#define MAX_KIQ_REG_BAILOUT_INTERVAL   5 /* in msecs, 5ms */

#define MAX_KIQ_REG_TRY 80 /* 20 -> 80 */

#define MAX_KIQ_REG_TRY 1000



int amdgpu_device_ip_set_clockgating_state(void *dev,

					   enum amd_ip_block_type block_type,
@@ -579,7 +579,8 @@ enum amd_reset_method { 
	AMD_RESET_METHOD_MODE0,

	AMD_RESET_METHOD_MODE1,

	AMD_RESET_METHOD_MODE2,

	AMD_RESET_METHOD_BACO

	AMD_RESET_METHOD_BACO,

	AMD_RESET_METHOD_PCI,

};



/*
@@ -891,6 +892,7 @@ struct amdgpu_device { 
	/* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */

	struct work_struct		hotplug_work;

	struct amdgpu_irq_src		crtc_irq;

	struct amdgpu_irq_src		vline0_irq;

	struct amdgpu_irq_src		vupdate_irq;

	struct amdgpu_irq_src		pageflip_irq;

	struct amdgpu_irq_src		hpd_irq;
@@ -1227,6 +1229,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev); 
int amdgpu_device_gpu_recover(struct amdgpu_device *adev,

			      struct amdgpu_job* job);

void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);

int amdgpu_device_pci_reset(struct amdgpu_device *adev);

bool amdgpu_device_need_post(struct amdgpu_device *adev);



void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+1 −2
Original line number Diff line number Diff line
@@ -98,7 +98,6 @@ static int amdgpu_cs_bo_handles_chunk(struct amdgpu_cs_parser *p, 
	return 0;



error_free:

	if (info)

	kvfree(info);



	return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+15 −4
Original line number Diff line number Diff line
@@ -929,6 +929,18 @@ void amdgpu_device_pci_config_reset(struct amdgpu_device *adev) 
	pci_write_config_dword(adev->pdev, 0x7c, AMDGPU_ASIC_RESET_DATA);

}



/**

 * amdgpu_device_pci_reset - reset the GPU using generic PCI means

 *

 * @adev: amdgpu_device pointer

 *

 * Resets the GPU using generic pci reset interfaces (FLR, SBR, etc.).

 */

int amdgpu_device_pci_reset(struct amdgpu_device *adev)

{

	return pci_reset_function(adev->pdev);

}



/*

 * GPU doorbell aperture helpers function.

 */
@@ -1433,10 +1445,8 @@ static void amdgpu_switcheroo_set_state(struct pci_dev *pdev, 
		amdgpu_device_resume(dev, true);



		dev->switch_power_state = DRM_SWITCH_POWER_ON;

		drm_kms_helper_poll_enable(dev);

	} else {

		pr_info("switched off\n");

		drm_kms_helper_poll_disable(dev);

		dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;

		amdgpu_device_suspend(dev, true);

		amdgpu_device_cache_pci_state(pdev);
@@ -3724,7 +3734,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) 


	r = amdgpu_device_ip_suspend_phase1(adev);



	amdgpu_amdkfd_suspend(adev, !fbcon);

	amdgpu_amdkfd_suspend(adev, adev->in_runpm);



	/* evict vram memory */

	amdgpu_bo_evict_vram(adev);
@@ -3808,7 +3818,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) 
			}

		}

	}

	r = amdgpu_amdkfd_resume(adev, !fbcon);

	r = amdgpu_amdkfd_resume(adev, adev->in_runpm);

	if (r)

		return r;
@@ -4211,6 +4221,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev) 
		case CHIP_NAVI12:

		case CHIP_SIENNA_CICHLID:

		case CHIP_NAVY_FLOUNDER:

		case CHIP_DIMGREY_CAVEFISH:

			break;

		default:

			goto disabled;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+11 −7
Original line number Diff line number Diff line
@@ -132,8 +132,12 @@ uint amdgpu_pg_mask = 0xffffffff; 
uint amdgpu_sdma_phase_quantum = 32;

char *amdgpu_disable_cu = NULL;

char *amdgpu_virtual_display = NULL;

/* OverDrive(bit 14) disabled by default*/

uint amdgpu_pp_feature_mask = 0xffffbfff;



/*

 * OverDrive(bit 14) disabled by default

 * GFX DCS(bit 19) disabled by default

 */

uint amdgpu_pp_feature_mask = 0xfff7bfff;

uint amdgpu_force_long_training;

int amdgpu_job_hang_limit;

int amdgpu_lbpw = -1;
@@ -789,9 +793,9 @@ module_param_named(tmz, amdgpu_tmz, int, 0444); 


/**

 * DOC: reset_method (int)

 * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)

 * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco, 5 = pci)

 */

MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");

MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco, 5 = pci)");

module_param_named(reset_method, amdgpu_reset_method, int, 0444);



/**
@@ -1344,11 +1348,12 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	adev->in_runpm = true;

	if (amdgpu_device_supports_atpx(drm_dev))

		drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;

	drm_kms_helper_poll_disable(drm_dev);



	ret = amdgpu_device_suspend(drm_dev, false);

	if (ret)

	if (ret) {

		adev->in_runpm = false;

		return ret;

	}



	if (amdgpu_device_supports_atpx(drm_dev)) {

		/* Only need to handle PCI state in the driver for ATPX
@@ -1401,7 +1406,6 @@ static int amdgpu_pmops_runtime_resume(struct device *dev) 
		amdgpu_device_baco_exit(drm_dev);

	}

	ret = amdgpu_device_resume(drm_dev, false);

	drm_kms_helper_poll_enable(drm_dev);

	if (amdgpu_device_supports_atpx(drm_dev))

		drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;

	adev->in_runpm = false;