Commit 4f18b9a6 authored by Bas Nieuwenhuizen's avatar Bas Nieuwenhuizen Committed by Alex Deucher
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drm/amdgpu: Add support for querying the max ibs in a submission. (v3)

This info would be used by radv to figure out when we need to
split a submission into multiple submissions. radv currently has
a limit of 192 which seems to work for most gfx submissions, but
is way too high for e.g. compute or sdma.

Userspace is available at
https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3

v3: Completely rewrote based on suggestion of making it a separate query.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2498


Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c30ddcec
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+9 −0
Original line number Diff line number Diff line
@@ -1140,6 +1140,15 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
		kfree(caps);
		return r;
	}
	case AMDGPU_INFO_MAX_IBS: {
		uint32_t max_ibs[AMDGPU_HW_IP_NUM];

		for (i = 0; i < AMDGPU_HW_IP_NUM; ++i)
			max_ibs[i] = amdgpu_ring_max_ibs(i);

		return copy_to_user(out, max_ibs,
				    min((size_t)size, sizeof(max_ibs))) ? -EFAULT : 0;
	}
	default:
		DRM_DEBUG_KMS("Invalid request %d\n", info->query);
		return -EINVAL;
+2 −0
Original line number Diff line number Diff line
@@ -876,6 +876,8 @@ struct drm_amdgpu_cs_chunk_data {
	#define AMDGPU_INFO_VIDEO_CAPS_DECODE		0
	/* Subquery id: Encode */
	#define AMDGPU_INFO_VIDEO_CAPS_ENCODE		1
/* Query the max number of IBs per gang per submission */
#define AMDGPU_INFO_MAX_IBS			0x22

#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT	0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK	0xff