Commit 4e44a0ba authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-v5.16-samsung' of... 

Merge tag 'clk-v5.16-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Initial clock driver for the Exynos850 SoC
 - Refactoring of the CPU clock code and conversion of Exynos5433
   CPU clock driver to the platform driver
 - A few conversions to devm_platform_ioremap_resource()
 - Updates of the Samsung Kconfig help text

* tag 'clk-v5.16-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  clk: samsung: add support for CPU clocks
  clk: samsung: Introduce Exynos850 clock driver
  dt-bindings: clock: Document Exynos850 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos850 CMU
  clk: samsung: clk-pll: Implement pll0831x PLL type
  clk: samsung: clk-pll: Implement pll0822x PLL type
  clk: samsung: s5pv210-audss: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos5433: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos4412-isp: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos-audss: Make use of devm_platform_ioremap_resource()
parents 6880fa6c 9fe667af

Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Samsung Exynos850 SoC clock controller



maintainers:

  - Sam Protsenko <semen.protsenko@linaro.org>

  - Chanwoo Choi <cw00.choi@samsung.com>

  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

  - Sylwester Nawrocki <s.nawrocki@samsung.com>

  - Tomasz Figa <tomasz.figa@gmail.com>



description: |

  Exynos850 clock controller is comprised of several CMU units, generating

  clocks for different domains. Those CMU units are modeled as separate device

  tree nodes, and might depend on each other. Root clocks in that clock tree are

  two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external

  clocks must be defined as fixed-rate clocks in dts.



  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and

  dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.



  Each clock is assigned an identifier and client nodes can use this identifier

  to specify the clock which they consume. All clocks available for usage

  in clock consumer nodes are defined as preprocessor macros in

  'dt-bindings/clock/exynos850.h' header.



properties:

  compatible:

    enum:

      - samsung,exynos850-cmu-top

      - samsung,exynos850-cmu-core

      - samsung,exynos850-cmu-dpu

      - samsung,exynos850-cmu-hsi

      - samsung,exynos850-cmu-peri



  clocks:

    minItems: 1

    maxItems: 5



  clock-names:

    minItems: 1

    maxItems: 5



  "#clock-cells":

    const: 1



  reg:

    maxItems: 1



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-top



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)



        clock-names:

          items:

            - const: oscclk



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-core



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_CORE bus clock (from CMU_TOP)

            - description: CCI clock (from CMU_TOP)

            - description: eMMC clock (from CMU_TOP)

            - description: SSS clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_core_bus

            - const: dout_core_cci

            - const: dout_core_mmc_embd

            - const: dout_core_sss



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-dpu



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: DPU clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_dpu



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-hsi



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: External RTC clock (32768 Hz)

            - description: CMU_HSI bus clock (from CMU_TOP)

            - description: SD card clock (from CMU_TOP)

            - description: "USB 2.0 DRD clock (from CMU_TOP)"



        clock-names:

          items:

            - const: oscclk

            - const: rtcclk

            - const: dout_hsi_bus

            - const: dout_hsi_mmc_card

            - const: dout_hsi_usb20drd



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-peri



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: CMU_PERI bus clock (from CMU_TOP)

            - description: UART clock (from CMU_TOP)

            - description: Parent clock for HSI2C and SPI (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_peri_bus

            - const: dout_peri_uart

            - const: dout_peri_ip



required:

  - compatible

  - "#clock-cells"

  - clocks

  - clock-names

  - reg



additionalProperties: false



examples:

  # Clock controller node for CMU_PERI

  - |

    #include <dt-bindings/clock/exynos850.h>



    cmu_peri: clock-controller@10030000 {

        compatible = "samsung,exynos850-cmu-peri";

        reg = <0x10030000 0x8000>;

        #clock-cells = <1>;



        clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,

                 <&cmu_top CLK_DOUT_PERI_UART>,

                 <&cmu_top CLK_DOUT_PERI_IP>;

        clock-names = "oscclk", "dout_peri_bus",

                      "dout_peri_uart", "dout_peri_ip";

    };



...

drivers/clk/samsung/Kconfig

+20 −10
Original line number Diff line number Diff line
@@ -67,7 +67,8 @@ config EXYNOS_5420_COMMON_CLK 
	depends on COMMON_CLK_SAMSUNG

	help

	  Support for the clock controller present on the Samsung

	  Exynos5420 SoCs. Choose Y here only if you build for this SoC.

	  Exynos5420/Exynos5422/Exynos5800 SoCs. Choose Y here only if you

	  build for this SoC.



config EXYNOS_ARM64_COMMON_CLK

	bool "Samsung Exynos ARMv8-family clock controller support" if COMPILE_TEST
@@ -79,38 +80,47 @@ config EXYNOS_AUDSS_CLK_CON 
	default y if ARCH_EXYNOS

	help

	  Support for the Audio Subsystem CLKCON clock controller present

	  on some Exynos SoC variants. Choose M or Y here if you want to

	  use audio devices such as I2S, PCM, etc.

	  on some Samsung Exynos SoC variants. Choose M or Y here if you want

	  to use audio devices such as I2S, PCM, etc.



config EXYNOS_CLKOUT

	tristate "Samsung Exynos clock output driver"

	depends on COMMON_CLK_SAMSUNG

	default y if ARCH_EXYNOS

	help

	  Support for the clock output (XCLKOUT) present on some of Exynos SoC

	  variants. Usually the XCLKOUT is used to monitor the status of the

	  certains clocks from SoC, but it could also be tied to other devices

	  as an input clock.

	  Support for the clock output (XCLKOUT) present on some of Samsung

	  Exynos SoC variants. Usually the XCLKOUT is used to monitor the

	  status of the certains clocks from SoC, but it could also be tied to

	  other devices as an input clock.



# For S3C24XX platforms, select following symbols:

config S3C2410_COMMON_CLK

	bool "Samsung S3C2410 clock controller support" if COMPILE_TEST

	select COMMON_CLK_SAMSUNG

	help

	  Build the s3c2410 clock driver based on the common clock framework.

	  Support for the clock controller present on the Samsung

	  S3C2410/S3C2440/S3C2442 SoCs. Choose Y here only if you build for

	  this SoC.



config S3C2410_COMMON_DCLK

	bool

	select COMMON_CLK_SAMSUNG

	select REGMAP_MMIO

	help

	  Temporary symbol to build the dclk driver based on the common clock

	  framework.

	  Support for the dclk clock controller present on the Samsung

	  S3C2410/S3C2412/S3C2440/S3C2443 SoCs. Choose Y here only if you build

	  for this SoC.



config S3C2412_COMMON_CLK

	bool "Samsung S3C2412 clock controller support" if COMPILE_TEST

	select COMMON_CLK_SAMSUNG

	help

	  Support for the clock controller present on the Samsung S3C2412 SoCs.

	  Choose Y here only if you build for this SoC.



config S3C2443_COMMON_CLK

	bool "Samsung S3C2443 clock controller support" if COMPILE_TEST

	select COMMON_CLK_SAMSUNG

	help

	  Support for the clock controller present on the Samsung

	  S3C2416/S3C2443 SoCs. Choose Y here only if you build for this SoC.

drivers/clk/samsung/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos5433.o 
obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o

obj-$(CONFIG_EXYNOS_CLKOUT)	+= clk-exynos-clkout.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos7.o

obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos850.o

obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o

obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o

obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o

drivers/clk/samsung/clk-cpu.c

+18 −0
Original line number Diff line number Diff line
@@ -469,3 +469,21 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, 
	kfree(cpuclk);

	return ret;

}



void __init samsung_clk_register_cpu(struct samsung_clk_provider *ctx,

		const struct samsung_cpu_clock *list, unsigned int nr_clk)

{

	unsigned int idx;

	unsigned int num_cfgs;

	struct clk_hw **hws = ctx->clk_data.hws;



	for (idx = 0; idx < nr_clk; idx++, list++) {

		/* find count of configuration rates in cfg */

		for (num_cfgs = 0; list->cfg[num_cfgs].prate != 0; )

			num_cfgs++;



		exynos_register_cpu_clock(ctx, list->id, list->name, hws[list->parent_id],

				hws[list->alt_parent_id], list->offset, list->cfg, num_cfgs,

				list->flags);

	}

}

drivers/clk/samsung/clk-exynos-audss.c

+1 −3
Original line number Diff line number Diff line
@@ -129,7 +129,6 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) 
	struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;

	const struct exynos_audss_clk_drvdata *variant;

	struct clk_hw **clk_table;

	struct resource *res;

	struct device *dev = &pdev->dev;

	int i, ret = 0;
@@ -137,8 +136,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) 
	if (!variant)

		return -EINVAL;



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	reg_base = devm_ioremap_resource(dev, res);

	reg_base = devm_platform_ioremap_resource(pdev, 0);

	if (IS_ERR(reg_base))

		return PTR_ERR(reg_base);