Unverified Commit 4e1ce304 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

Merge tag 'soc2arch-immutable' of... 

Merge tag 'soc2arch-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into for-next

SOC_FOO to ARCH_FOO conversion for RISC-V

RISC-V is an outlier in using SOC_FOO rather than ARCH_FOO for
vendors/micro-archs. SOC_FOO may make more sense (I personally prefer
it), but the rest of the "world" uses ARCH_FOO. That'd be fine, with
with an increasing number of existing SoC vendors moving to RISC-V,
unifying our symbol names with the expectations of the rest of the world
makes sense.
Folks did not seem keen on changing the world (and they can't really be
blamed for that) so convert RISC-V over to match.

Add some ARCH_FOO stubs alongside the existing SOC_FOO ones, which will
be removed once all users of SOC_FOO have been converted*, and convert
the DT bits of RISC-V kbuild over to the new symbols.

* It may be best to wait until after the next LTS to remove the SOC_FOO
  ones, for the sake of external users.

* tag 'soc2arch-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

:
  RISC-V: stop directly selecting drivers for SOC_CANAAN
  RISC-V: stop selecting SiFive clock and serial drivers directly
  RISC-V: stop selecting the PolarFire SoC clock driver
  RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO
  RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN
  RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents 1b929c02 3af577f9

arch/riscv/Kconfig.socs

+26 −13
Original line number Diff line number Diff line 
menu "SoC selection"



config ARCH_MICROCHIP_POLARFIRE

	def_bool SOC_MICROCHIP_POLARFIRE



config SOC_MICROCHIP_POLARFIRE

	bool "Microchip PolarFire SoCs"

	select MCHP_CLK_MPFS

	help

	  This enables support for Microchip PolarFire SoC platforms.
@@ -11,16 +13,18 @@ config ARCH_RENESAS 
	help

	  This enables support for the RISC-V based Renesas SoCs.



config ARCH_SIFIVE

	def_bool SOC_SIFIVE



config SOC_SIFIVE

	bool "SiFive SoCs"

	select SERIAL_SIFIVE if TTY

	select SERIAL_SIFIVE_CONSOLE if TTY

	select CLK_SIFIVE

	select CLK_SIFIVE_PRCI

	select ERRATA_SIFIVE if !XIP_KERNEL

	help

	  This enables support for SiFive SoC platform hardware.



config ARCH_STARFIVE

	def_bool SOC_STARFIVE



config SOC_STARFIVE

	bool "StarFive SoCs"

	select PINCTRL
@@ -28,6 +32,9 @@ config SOC_STARFIVE 
	help

	  This enables support for StarFive SoC platform hardware.



config ARCH_VIRT

	def_bool SOC_VIRT

	

config SOC_VIRT

	bool "QEMU Virt Machine"

	select CLINT_TIMER if RISCV_M_MODE
@@ -42,24 +49,27 @@ config SOC_VIRT 
	help

	  This enables support for QEMU Virt Machine.



config ARCH_CANAAN

	def_bool SOC_CANAAN



config SOC_CANAAN

	bool "Canaan Kendryte K210 SoC"

	depends on !MMU

	select CLINT_TIMER if RISCV_M_MODE

	select SERIAL_SIFIVE if TTY

	select SERIAL_SIFIVE_CONSOLE if TTY

	select ARCH_HAS_RESET_CONTROLLER

	select PINCTRL

	select COMMON_CLK

	select COMMON_CLK_K210

	help

	  This enables support for Canaan Kendryte K210 SoC platform hardware.



if SOC_CANAAN

if ARCH_CANAAN



config ARCH_CANAAN_K210_DTB_BUILTIN

	def_bool SOC_CANAAN_K210_DTB_BUILTIN



config SOC_CANAAN_K210_DTB_BUILTIN

	bool "Builtin device tree for the Canaan Kendryte K210"

	depends on SOC_CANAAN

	depends on ARCH_CANAAN

	default y

	select OF

	select BUILTIN_DTB
@@ -68,16 +78,19 @@ config SOC_CANAAN_K210_DTB_BUILTIN 
	  This option should be selected if no bootloader is being used.

	  If unsure, say Y.



config ARCH_CANAAN_K210_DTB_SOURCE

	def_bool SOC_CANAAN_K210_DTB_SOURCE



config SOC_CANAAN_K210_DTB_SOURCE

	string "Source file for the Canaan Kendryte K210 builtin DTB"

	depends on SOC_CANAAN

	depends on SOC_CANAAN_K210_DTB_BUILTIN

	depends on ARCH_CANAAN

	depends on ARCH_CANAAN_K210_DTB_BUILTIN

	default "k210_generic"

	help

	  Base name (without suffix, relative to arch/riscv/boot/dts/canaan)

	  for the DTS file that will be used to produce the DTB linked into the

	  kernel.



endif # SOC_CANAAN

endif # ARCH_CANAAN



endmenu # "SoC selection"

arch/riscv/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ endif 
endif



ifneq ($(CONFIG_XIP_KERNEL),y)

ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)

ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)

KBUILD_IMAGE := $(boot)/loader.bin

else

ifeq ($(CONFIG_EFI_ZBOOT),)

arch/riscv/boot/dts/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

subdir-y += sifive

subdir-y += starfive

subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan

subdir-y += canaan

subdir-y += microchip

subdir-y += renesas

arch/riscv/boot/dts/canaan/Makefile

+7 −7
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb

dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb

dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb

dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb

dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb

dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb

dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb

dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb

dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb

dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb

dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb

dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maixduino.dtb



obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
 
obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))

arch/riscv/boot/dts/microchip/Makefile

+4 −4
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb

dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb

dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb

dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb

obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))