Commit 4dc8e494 authored by Cai Huoqing's avatar Cai Huoqing Committed by Alex Deucher
Browse files

drm/amd/display: Fix typo in comments 



Remove the repeated word 'the' from comments

Signed-off-by: default avatarCai Huoqing <caihuoqing@baidu.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 198fbe15

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -1030,7 +1030,7 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 


	/* Timing borders are part of vactive that we are also supposed to skip in addition

	 * to any stream dst offset. Since dm logic assumes dst is in addressable

	 * space we need to add the the left and top borders to dst offsets temporarily.

	 * space we need to add the left and top borders to dst offsets temporarily.

	 * TODO: fix in DM, stream dst is supposed to be in vactive

	 */

	pipe_ctx->stream->dst.x += timing->h_border_left;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

+1 −1
Original line number Diff line number Diff line
@@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib, 
	log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element



	// each 64b meta request for dcn is 8x8 meta elements and

	// a meta element covers one 256b block of the the data surface.

	// a meta element covers one 256b block of the data surface.

	log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256

	log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element

			- log2_meta_req_height;

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

+1 −1
Original line number Diff line number Diff line
@@ -488,7 +488,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib, 
	log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element



	// each 64b meta request for dcn is 8x8 meta elements and

	// a meta element covers one 256b block of the the data surface.

	// a meta element covers one 256b block of the data surface.

	log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256

	log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element

			- log2_meta_req_height;

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

+1 −1
Original line number Diff line number Diff line
@@ -482,7 +482,7 @@ static void get_meta_and_pte_attr( 
	log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element



	// each 64b meta request for dcn is 8x8 meta elements and

	// a meta element covers one 256b block of the the data surface.

	// a meta element covers one 256b block of the data surface.

	log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256

	log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element

			- log2_meta_req_height;

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

+1 −1
Original line number Diff line number Diff line
@@ -549,7 +549,7 @@ static void get_meta_and_pte_attr(struct display_mode_lib *mode_lib, 
	log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element



				 // each 64b meta request for dcn is 8x8 meta elements and

				 // a meta element covers one 256b block of the the data surface.

				 // a meta element covers one 256b block of the data surface.

	log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256

	log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element

		- log2_meta_req_height;