Unverified Commit 4da90678 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'memory-controller-drv-brcm-6.1' of... 

Merge tag 'memory-controller-drv-brcm-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v6.1 - Broadcom

Add support for the Broadcom STB memory controller (BRCMSTB_MEMC).

* tag 'memory-controller-drv-brcm-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: brcmstb_memc: Add Broadcom STB memory controller driver
  Documentation: sysfs: Document Broadcom STB memc sysfs knobs
  dt-bindings: memory-controller: Document Broadcom STB MEMC

Link: https://lore.kernel.org/r/20220909153037.824092-3-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d551bdf3 a4be90ff

Documentation/ABI/testing/sysfs-platform-brcmstb-memc

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What:		/sys/bus/platform/devices/*/srpd

Date:		July 2022

KernelVersion:	5.21

Contact:	Florian Fainelli <f.fainelli@gmail.com>

Description:

		Self Refresh Power Down (SRPD) inactivity timeout counted in

		internal DDR controller clock cycles. Possible values range

		from 0 (disable inactivity timeout) to 65535 (0xffff).



What:		/sys/bus/platform/devices/*/frequency

Date:		July 2022

KernelVersion:	5.21

Contact:	Florian Fainelli <f.fainelli@gmail.com>

Description:

		DDR PHY frequency in Hz.

Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt

+2 −9
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@@ -187,15 +187,8 @@ Required properties: 
Sequencer DRAM parameters and control registers. Used for Self-Refresh

Power-Down (SRPD), among other things.



Required properties:

- compatible     : should contain one of these

	"brcm,brcmstb-memc-ddr-rev-b.2.1"

	"brcm,brcmstb-memc-ddr-rev-b.2.2"

	"brcm,brcmstb-memc-ddr-rev-b.2.3"

	"brcm,brcmstb-memc-ddr-rev-b.3.0"

	"brcm,brcmstb-memc-ddr-rev-b.3.1"

	"brcm,brcmstb-memc-ddr"

- reg            : the MEMC DDR register range

See Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml for a

full list of supported compatible strings and properties.



Example:

Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Memory controller (MEMC) for Broadcom STB



maintainers:

  - Florian Fainelli <f.fainelli@gmail.com>



properties:

  compatible:

    items:

      - enum:

          - brcm,brcmstb-memc-ddr-rev-b.1.x

          - brcm,brcmstb-memc-ddr-rev-b.2.0

          - brcm,brcmstb-memc-ddr-rev-b.2.1

          - brcm,brcmstb-memc-ddr-rev-b.2.2

          - brcm,brcmstb-memc-ddr-rev-b.2.3

          - brcm,brcmstb-memc-ddr-rev-b.2.5

          - brcm,brcmstb-memc-ddr-rev-b.2.6

          - brcm,brcmstb-memc-ddr-rev-b.2.7

          - brcm,brcmstb-memc-ddr-rev-b.2.8

          - brcm,brcmstb-memc-ddr-rev-b.3.0

          - brcm,brcmstb-memc-ddr-rev-b.3.1

          - brcm,brcmstb-memc-ddr-rev-c.1.0

          - brcm,brcmstb-memc-ddr-rev-c.1.1

          - brcm,brcmstb-memc-ddr-rev-c.1.2

          - brcm,brcmstb-memc-ddr-rev-c.1.3

          - brcm,brcmstb-memc-ddr-rev-c.1.4

      - const: brcm,brcmstb-memc-ddr



  reg:

    maxItems: 1



  clock-frequency:

    description: DDR PHY frequency in Hz



required:

  - compatible

  - reg



additionalProperties: false



examples:

  - |

    memory-controller@9902000 {

        compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", "brcm,brcmstb-memc-ddr";

        reg = <0x9902000 0x600>;

        clock-frequency = <2133000000>;

    };

drivers/memory/Kconfig

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@@ -66,6 +66,15 @@ config BRCMSTB_DPFE 
	  for the DRAM's temperature. Slower refresh rate means cooler RAM,

	  higher refresh rate means hotter RAM.



config BRCMSTB_MEMC

	tristate "Broadcom STB MEMC driver"

	default ARCH_BRCMSTB

	depends on ARCH_BRCMSTB || COMPILE_TEST

	help

	  This driver provides a way to configure the Broadcom STB memory

	  controller and specifically control the Self Refresh Power Down

	  (SRPD) inactivity timeout.



config BT1_L2_CTL

	bool "Baikal-T1 CM2 L2-RAM Cache Control Block"

	depends on MIPS_BAIKAL_T1 || COMPILE_TEST

drivers/memory/Makefile

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@@ -11,6 +11,7 @@ obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o 
obj-$(CONFIG_ATMEL_SDRAMC)	+= atmel-sdramc.o

obj-$(CONFIG_ATMEL_EBI)		+= atmel-ebi.o

obj-$(CONFIG_BRCMSTB_DPFE)	+= brcmstb_dpfe.o

obj-$(CONFIG_BRCMSTB_MEMC)	+= brcmstb_memc.o

obj-$(CONFIG_BT1_L2_CTL)	+= bt1-l2-ctl.o

obj-$(CONFIG_TI_AEMIF)		+= ti-aemif.o

obj-$(CONFIG_TI_EMIF)		+= emif.o