Commit 4d510659 authored by CK Hu's avatar CK Hu Committed by Chun-Kuang Hu
Browse files

drm/mediatek: Change sub driver interface from mtk_ddp_comp to device 



Some ddp component exist in both display path and other path, so
sub driver interface should get rid of display info. Using device
instead of mtk_ddp_comp make interface general.

Signed-off-by: default avatarCK Hu <ck.hu@mediatek.com>
Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 616443ca

drivers/gpu/drm/mediatek/mtk_disp_color.c

+4 −9
Original line number Diff line number Diff line
@@ -44,11 +44,6 @@ struct mtk_disp_color { 
	const struct mtk_disp_color_data	*data;

};



static inline struct mtk_disp_color *comp_to_color(struct mtk_ddp_comp *comp)

{

	return container_of(comp, struct mtk_disp_color, ddp_comp);

}



static int mtk_color_clk_enable(struct device *dev)

{

	struct mtk_disp_color *color = dev_get_drvdata(dev);
@@ -63,19 +58,19 @@ static void mtk_color_clk_disable(struct device *dev) 
	clk_disable_unprepare(color->clk);

}



static void mtk_color_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_color_config(struct device *dev, unsigned int w,

			     unsigned int h, unsigned int vrefresh,

			     unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_color *color = comp_to_color(comp);

	struct mtk_disp_color *color = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color));

	mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color));

}



static void mtk_color_start(struct mtk_ddp_comp *comp)

static void mtk_color_start(struct device *dev)

{

	struct mtk_disp_color *color = comp_to_color(comp);

	struct mtk_disp_color *color = dev_get_drvdata(dev);



	writel(COLOR_BYPASS_ALL | COLOR_SEQ_SEL,

	       color->regs + DISP_COLOR_CFG_MAIN);

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

+26 −31
Original line number Diff line number Diff line
@@ -78,11 +78,6 @@ struct mtk_disp_ovl { 
	const struct mtk_disp_ovl_data	*data;

};



static inline struct mtk_disp_ovl *comp_to_ovl(struct mtk_ddp_comp *comp)

{

	return container_of(comp, struct mtk_disp_ovl, ddp_comp);

}



static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id)

{

	struct mtk_disp_ovl *priv = dev_id;
@@ -99,19 +94,19 @@ static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id) 
	return IRQ_HANDLED;

}



static void mtk_ovl_enable_vblank(struct mtk_ddp_comp *comp,

static void mtk_ovl_enable_vblank(struct device *dev,

				  struct drm_crtc *crtc)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	ovl->crtc = crtc;

	writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA);

	writel_relaxed(OVL_FME_CPL_INT, ovl->regs + DISP_REG_OVL_INTEN);

}



static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)

static void mtk_ovl_disable_vblank(struct device *dev)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	ovl->crtc = NULL;

	writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
@@ -131,25 +126,25 @@ static void mtk_ovl_clk_disable(struct device *dev) 
	clk_disable_unprepare(ovl->clk);

}



static void mtk_ovl_start(struct mtk_ddp_comp *comp)

static void mtk_ovl_start(struct device *dev)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	writel_relaxed(0x1, ovl->regs + DISP_REG_OVL_EN);

}



static void mtk_ovl_stop(struct mtk_ddp_comp *comp)

static void mtk_ovl_stop(struct device *dev)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_EN);

}



static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_ovl_config(struct device *dev, unsigned int w,

			   unsigned int h, unsigned int vrefresh,

			   unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	if (w != 0 && h != 0)

		mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs,
@@ -160,20 +155,20 @@ static void mtk_ovl_config(struct mtk_ddp_comp *comp, unsigned int w, 
	mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST);

}



static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp)

static unsigned int mtk_ovl_layer_nr(struct device *dev)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	return ovl->data->layer_nr;

}



static unsigned int mtk_ovl_supported_rotations(struct mtk_ddp_comp *comp)

static unsigned int mtk_ovl_supported_rotations(struct device *dev)

{

	return DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |

	       DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;

}



static int mtk_ovl_layer_check(struct mtk_ddp_comp *comp, unsigned int idx,

static int mtk_ovl_layer_check(struct device *dev, unsigned int idx,

			       struct mtk_plane_state *mtk_state)

{

	struct drm_plane_state *state = &mtk_state->base;
@@ -201,13 +196,13 @@ static int mtk_ovl_layer_check(struct mtk_ddp_comp *comp, unsigned int idx, 
	return 0;

}



static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx,

static void mtk_ovl_layer_on(struct device *dev, unsigned int idx,

			     struct cmdq_pkt *cmdq_pkt)

{

	unsigned int gmc_thrshd_l;

	unsigned int gmc_thrshd_h;

	unsigned int gmc_value;

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs,

		      DISP_REG_OVL_RDMA_CTRL(idx));
@@ -226,10 +221,10 @@ static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx, 
			   DISP_REG_OVL_SRC_CON, BIT(idx));

}



static void mtk_ovl_layer_off(struct mtk_ddp_comp *comp, unsigned int idx,

static void mtk_ovl_layer_off(struct device *dev, unsigned int idx,

			      struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(comp->dev);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs,

			   DISP_REG_OVL_SRC_CON, BIT(idx));
@@ -273,11 +268,11 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt) 
	}

}



static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,

static void mtk_ovl_layer_config(struct device *dev, unsigned int idx,

				 struct mtk_plane_state *state,

				 struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);

	struct mtk_plane_pending_state *pending = &state->pending;

	unsigned int addr = pending->addr;

	unsigned int pitch = pending->pitch & 0xffff;
@@ -287,7 +282,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, 
	unsigned int con;



	if (!pending->enable) {

		mtk_ovl_layer_off(comp, idx, cmdq_pkt);

		mtk_ovl_layer_off(dev, idx, cmdq_pkt);

		return;

	}
@@ -316,12 +311,12 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, 
	mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl->regs,

			      DISP_REG_OVL_ADDR(ovl, idx));



	mtk_ovl_layer_on(comp, idx, cmdq_pkt);

	mtk_ovl_layer_on(dev, idx, cmdq_pkt);

}



static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp)

static void mtk_ovl_bgclr_in_on(struct device *dev)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);

	unsigned int reg;



	reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
@@ -329,9 +324,9 @@ static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp) 
	writel(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON);

}



static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp)

static void mtk_ovl_bgclr_in_off(struct device *dev)

{

	struct mtk_disp_ovl *ovl = comp_to_ovl(comp);

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);

	unsigned int reg;



	reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

+17 −22
Original line number Diff line number Diff line
@@ -69,11 +69,6 @@ struct mtk_disp_rdma { 
	const struct mtk_disp_rdma_data	*data;

};



static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)

{

	return container_of(comp, struct mtk_disp_rdma, ddp_comp);

}



static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id)

{

	struct mtk_disp_rdma *priv = dev_id;
@@ -90,32 +85,32 @@ static irqreturn_t mtk_disp_rdma_irq_handler(int irq, void *dev_id) 
	return IRQ_HANDLED;

}



static void rdma_update_bits(struct mtk_ddp_comp *comp, unsigned int reg,

static void rdma_update_bits(struct device *dev, unsigned int reg,

			     unsigned int mask, unsigned int val)

{

	struct mtk_disp_rdma *rdma = dev_get_drvdata(comp->dev);

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);

	unsigned int tmp = readl(rdma->regs + reg);



	tmp = (tmp & ~mask) | (val & mask);

	writel(tmp, rdma->regs + reg);

}



static void mtk_rdma_enable_vblank(struct mtk_ddp_comp *comp,

static void mtk_rdma_enable_vblank(struct device *dev,

				   struct drm_crtc *crtc)

{

	struct mtk_disp_rdma *rdma = comp_to_rdma(comp);

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);



	rdma->crtc = crtc;

	rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,

	rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT,

			 RDMA_FRAME_END_INT);

}



static void mtk_rdma_disable_vblank(struct mtk_ddp_comp *comp)

static void mtk_rdma_disable_vblank(struct device *dev)

{

	struct mtk_disp_rdma *rdma = comp_to_rdma(comp);

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);



	rdma->crtc = NULL;

	rdma_update_bits(comp, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);

	rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);

}



static int mtk_rdma_clk_enable(struct device *dev)
@@ -132,24 +127,24 @@ static void mtk_rdma_clk_disable(struct device *dev) 
	clk_disable_unprepare(rdma->clk);

}



static void mtk_rdma_start(struct mtk_ddp_comp *comp)

static void mtk_rdma_start(struct device *dev)

{

	rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN,

	rdma_update_bits(dev, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN,

			 RDMA_ENGINE_EN);

}



static void mtk_rdma_stop(struct mtk_ddp_comp *comp)

static void mtk_rdma_stop(struct device *dev)

{

	rdma_update_bits(comp, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);

	rdma_update_bits(dev, DISP_REG_RDMA_GLOBAL_CON, RDMA_ENGINE_EN, 0);

}



static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width,

static void mtk_rdma_config(struct device *dev, unsigned int width,

			    unsigned int height, unsigned int vrefresh,

			    unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	unsigned int threshold;

	unsigned int reg;

	struct mtk_disp_rdma *rdma = comp_to_rdma(comp);

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);



	mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs,

			   DISP_REG_RDMA_SIZE_CON_0, 0xfff);
@@ -206,16 +201,16 @@ static unsigned int rdma_fmt_convert(struct mtk_disp_rdma *rdma, 
	}

}



static unsigned int mtk_rdma_layer_nr(struct mtk_ddp_comp *comp)

static unsigned int mtk_rdma_layer_nr(struct device *dev)

{

	return 1;

}



static void mtk_rdma_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,

static void mtk_rdma_layer_config(struct device *dev, unsigned int idx,

				  struct mtk_plane_state *state,

				  struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_rdma *rdma = comp_to_rdma(comp);

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);

	struct mtk_plane_pending_state *pending = &state->pending;

	unsigned int addr = pending->addr;

	unsigned int pitch = pending->pitch & 0xffff;

drivers/gpu/drm/mediatek/mtk_dpi.c

+4 −4
Original line number Diff line number Diff line
@@ -562,16 +562,16 @@ static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = { 
	.enable = mtk_dpi_bridge_enable,

};



static void mtk_dpi_start(struct mtk_ddp_comp *comp)

static void mtk_dpi_start(struct device *dev)

{

	struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);

	struct mtk_dpi *dpi = dev_get_drvdata(dev);



	mtk_dpi_power_on(dpi);

}



static void mtk_dpi_stop(struct mtk_ddp_comp *comp)

static void mtk_dpi_stop(struct device *dev)

{

	struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);

	struct mtk_dpi *dpi = dev_get_drvdata(dev);



	mtk_dpi_power_off(dpi);

}

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

+43 −51
Original line number Diff line number Diff line
@@ -150,10 +150,10 @@ static void mtk_ddp_clk_disable(struct device *dev) 
	clk_disable_unprepare(priv->clk);

}



void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,

static void mtk_dither_set(struct device *dev, unsigned int bpc,

		    unsigned int CFG, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	/* If bpc equal to 0, the dithering function didn't be enabled */

	if (bpc == 0)
@@ -177,74 +177,74 @@ void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc, 
	}

}



static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_od_config(struct device *dev, unsigned int w,

			  unsigned int h, unsigned int vrefresh,

			  unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_OD_SIZE);

	mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, &priv->cmdq_reg, priv->regs, DISP_OD_CFG);

	mtk_dither_set(comp, bpc, DISP_OD_CFG, cmdq_pkt);

	mtk_dither_set(dev, bpc, DISP_OD_CFG, cmdq_pkt);

}



static void mtk_od_start(struct mtk_ddp_comp *comp)

static void mtk_od_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(1, priv->regs + DISP_OD_EN);

}



static void mtk_ufoe_start(struct mtk_ddp_comp *comp)

static void mtk_ufoe_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(UFO_BYPASS, priv->regs + DISP_REG_UFO_START);

}



static void mtk_aal_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_aal_config(struct device *dev, unsigned int w,

			   unsigned int h, unsigned int vrefresh,

			   unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_AAL_SIZE);

}



static void mtk_aal_start(struct mtk_ddp_comp *comp)

static void mtk_aal_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(AAL_EN, priv->regs + DISP_AAL_EN);

}



static void mtk_aal_stop(struct mtk_ddp_comp *comp)

static void mtk_aal_stop(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel_relaxed(0x0, priv->regs + DISP_AAL_EN);

}



static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_ccorr_config(struct device *dev, unsigned int w,

			     unsigned int h, unsigned int vrefresh,

			     unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_CCORR_SIZE);

	mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &priv->cmdq_reg, priv->regs, DISP_CCORR_CFG);

}



static void mtk_ccorr_start(struct mtk_ddp_comp *comp)

static void mtk_ccorr_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(CCORR_EN, priv->regs + DISP_CCORR_EN);

}



static void mtk_ccorr_stop(struct mtk_ddp_comp *comp)

static void mtk_ccorr_stop(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel_relaxed(0x0, priv->regs + DISP_CCORR_EN);

}
@@ -269,10 +269,10 @@ static u16 mtk_ctm_s31_32_to_s1_10(u64 in) 
	return r;

}



static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp,

static void mtk_ccorr_ctm_set(struct device *dev,

			      struct drm_crtc_state *state)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);

	struct drm_property_blob *blob = state->ctm;

	struct drm_color_ctm *ctm;

	const u64 *input;
@@ -301,58 +301,58 @@ static void mtk_ccorr_ctm_set(struct mtk_ddp_comp *comp, 
		      &priv->cmdq_reg, priv->regs, DISP_CCORR_COEF_4);

}



static void mtk_dither_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_dither_config(struct device *dev, unsigned int w,

			      unsigned int h, unsigned int vrefresh,

			      unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE);

	mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG);

}



static void mtk_dither_start(struct mtk_ddp_comp *comp)

static void mtk_dither_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(DITHER_EN, priv->regs + DISP_DITHER_EN);

}



static void mtk_dither_stop(struct mtk_ddp_comp *comp)

static void mtk_dither_stop(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel_relaxed(0x0, priv->regs + DISP_DITHER_EN);

}



static void mtk_gamma_config(struct mtk_ddp_comp *comp, unsigned int w,

static void mtk_gamma_config(struct device *dev, unsigned int w,

			     unsigned int h, unsigned int vrefresh,

			     unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_GAMMA_SIZE);

	mtk_dither_set(comp, bpc, DISP_GAMMA_CFG, cmdq_pkt);

	mtk_dither_set(dev, bpc, DISP_GAMMA_CFG, cmdq_pkt);

}



static void mtk_gamma_start(struct mtk_ddp_comp *comp)

static void mtk_gamma_start(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel(GAMMA_EN, priv->regs  + DISP_GAMMA_EN);

}



static void mtk_gamma_stop(struct mtk_ddp_comp *comp)

static void mtk_gamma_stop(struct device *dev)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);



	writel_relaxed(0x0, priv->regs  + DISP_GAMMA_EN);

}



static void mtk_gamma_set(struct mtk_ddp_comp *comp,

static void mtk_gamma_set(struct device *dev,

			  struct drm_crtc_state *state)

{

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(comp->dev);

	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);

	unsigned int i, reg;

	struct drm_color_lut *lut;

	void __iomem *lut_base;
@@ -568,18 +568,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, 


	comp->id = comp_id;

	comp->funcs = funcs ?: mtk_ddp_matches[comp_id].funcs;



	if (comp_id == DDP_COMPONENT_BLS ||

	    comp_id == DDP_COMPONENT_DPI0 ||

	    comp_id == DDP_COMPONENT_DPI1 ||

	    comp_id == DDP_COMPONENT_DSI0 ||

	    comp_id == DDP_COMPONENT_DSI1 ||

	    comp_id == DDP_COMPONENT_DSI2 ||

	    comp_id == DDP_COMPONENT_DSI3 ||

	    comp_id == DDP_COMPONENT_PWM0) {

		return 0;

	}



	comp_pdev = of_find_device_by_node(node);

	if (!comp_pdev) {

		DRM_INFO("Waiting for device %s\n", node->full_name);
@@ -597,9 +585,13 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, 
			return ret;

	}



	if (type == MTK_DISP_COLOR ||

	if (type == MTK_DISP_BLS ||

	    type == MTK_DISP_COLOR ||

	    type == MTK_DPI ||

	    type == MTK_DSI ||

	    type == MTK_DISP_OVL ||

	    type == MTK_DISP_OVL_2L ||

	    type == MTK_DISP_PWM ||

	    type == MTK_DISP_RDMA)

		return 0;