Commit 4d2f6dde authored by Florian Fainelli's avatar Florian Fainelli Committed by Jakub Kicinski
Browse files

net: dsa: bcm_sf2: Have PHYLINK configure CPU/IMP port(s) 



Remove the artificial limitations imposed upon
bcm_sf2_sw_mac_link_{up,down} and allow us to override the link
parameters for IMP port(s) as well as regular ports by accounting for
the special differences that exist there.

Remove the code that did override the link parameters in
bcm_sf2_imp_setup().

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1ed26ce4

drivers/net/dsa/bcm_sf2.c

+43 −52
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port) 
{

	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);

	unsigned int i;

	u32 reg, offset;

	u32 reg;



	/* Enable the port memories */

	reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
@@ -185,17 +185,6 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port) 
	b53_brcm_hdr_setup(ds, port);



	if (port == 8) {

		offset = bcm_sf2_port_override_offset(priv, port);



		/* Force link status for IMP port */

		reg = core_readl(priv, offset);

		reg |= (MII_SW_OR | LINK_STS);

		if (priv->type == BCM4908_DEVICE_ID)

			reg |= GMII_SPEED_UP_2G;

		else

			reg &= ~GMII_SPEED_UP_2G;

		core_writel(priv, reg, offset);



		/* Enable Broadcast, Multicast, Unicast forwarding to IMP port */

		reg = core_readl(priv, CORE_IMP_CTL);

		reg |= (RX_BCST_EN | RX_MCST_EN | RX_UCST_EN);
@@ -826,12 +815,10 @@ static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port, 
	if (priv->wol_ports_mask & BIT(port))

		return;



	if (port != core_readl(priv, CORE_IMP0_PRT_ID)) {

	offset = bcm_sf2_port_override_offset(priv, port);

	reg = core_readl(priv, offset);

	reg &= ~LINK_STS;

	core_writel(priv, reg, offset);

	}



	bcm_sf2_sw_mac_link_set(ds, port, interface, false);

}
@@ -845,17 +832,14 @@ static void bcm_sf2_sw_mac_link_up(struct dsa_switch *ds, int port, 
{

	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);

	struct ethtool_eee *p = &priv->dev->ports[port].eee;



	bcm_sf2_sw_mac_link_set(ds, port, interface, true);



	if (port != core_readl(priv, CORE_IMP0_PRT_ID)) {

	u32 reg_rgmii_ctrl = 0;

	u32 reg, offset;



	bcm_sf2_sw_mac_link_set(ds, port, interface, true);



	offset = bcm_sf2_port_override_offset(priv, port);



		if (interface == PHY_INTERFACE_MODE_RGMII ||

		    interface == PHY_INTERFACE_MODE_RGMII_TXID ||

	if (phy_interface_mode_is_rgmii(interface) ||

	    interface == PHY_INTERFACE_MODE_MII ||

	    interface == PHY_INTERFACE_MODE_REVMII) {

		reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
@@ -870,7 +854,15 @@ static void bcm_sf2_sw_mac_link_up(struct dsa_switch *ds, int port, 
		reg_writel(priv, reg, reg_rgmii_ctrl);

	}



		reg = SW_OVERRIDE | LINK_STS;

	reg = LINK_STS;

	if (port == 8) {

		if (priv->type == BCM4908_DEVICE_ID)

			reg |= GMII_SPEED_UP_2G;

		reg |= MII_SW_OR;

	} else {

		reg |= SW_OVERRIDE;

	}



	switch (speed) {

	case SPEED_1000:

		reg |= SPDSTS_1000 << SPEED_SHIFT;
@@ -889,7 +881,6 @@ static void bcm_sf2_sw_mac_link_up(struct dsa_switch *ds, int port, 
		reg |= RXFLOW_CNTL;



	core_writel(priv, reg, offset);

	}



	if (mode == MLO_AN_PHY && phydev)

		p->eee_enabled = b53_eee_init(ds, port, phydev);