Unverified Commit 4d163ad7 authored by Michael Hennerich's avatar Michael Hennerich Committed by Mark Brown
Browse files

spi: cadence: cache reference clock rate during probe 



The issue is that using SPI from a callback under the CCF lock will
deadlock, since this code uses clk_get_rate().

Fixes: c474b386 ("spi: Add driver for Cadence SPI controller")
Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarAlexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20210114154217.51996-1-alexandru.ardelean@analog.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 7a2da5d7

drivers/spi/spi-cadence.c

+4 −2
Original line number Diff line number Diff line
@@ -115,6 +115,7 @@ struct cdns_spi { 
	void __iomem *regs;

	struct clk *ref_clk;

	struct clk *pclk;

	unsigned int clk_rate;

	u32 speed_hz;

	const u8 *txbuf;

	u8 *rxbuf;
@@ -250,7 +251,7 @@ static void cdns_spi_config_clock_freq(struct spi_device *spi, 
	u32 ctrl_reg, baud_rate_val;

	unsigned long frequency;



	frequency = clk_get_rate(xspi->ref_clk);

	frequency = xspi->clk_rate;



	ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR);
@@ -558,8 +559,9 @@ static int cdns_spi_probe(struct platform_device *pdev) 
	master->auto_runtime_pm = true;

	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;



	xspi->clk_rate = clk_get_rate(xspi->ref_clk);

	/* Set to default valid value */

	master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;

	master->max_speed_hz = xspi->clk_rate / 4;

	xspi->speed_hz = master->max_speed_hz;



	master->bits_per_word_mask = SPI_BPW_MASK(8);