Commit 4d1044fc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Enabling the FPU is now a static_key

 - Improvements to the Svpbmt support

 - CPU topology bindings for a handful of systems

 - Support for systems with 64-bit hart IDs

 - Many settings have been enabled in the defconfig, including both
   support for the StarFive systems and many of the Docker requirements

There are also a handful of cleanups and improvements, as usual.

* tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (28 commits)
  riscv: enable Docker requirements in defconfig
  riscv: convert the t-head pbmt errata to use the __nops macro
  riscv: introduce nops and __nops macros for NOP sequences
  RISC-V: Add fast call path of crash_kexec()
  riscv: mmap with PROT_WRITE but no PROT_READ is invalid
  riscv/efi_stub: Add 64bit boot-hartid support on RV64
  riscv: cpu: Add 64bit hartid support on RV64
  riscv: smp: Add 64bit hartid support on RV64
  riscv: spinwait: Fix hartid variable type
  riscv: cpu_ops_sbi: Add 64bit hartid support on RV64
  riscv: dts: sifive: "fix" pmic watchdog node name
  riscv: dts: canaan: Add k210 topology information
  riscv: dts: sifive: Add fu740 topology information
  riscv: dts: sifive: Add fu540 topology information
  riscv: dts: starfive: Add JH7100 CPU topology
  RISC-V: Add CONFIG_{NON,}PORTABLE
  riscv: config: enable SOC_STARFIVE in defconfig
  riscv: dts: microchip: Add mpfs' topology information
  riscv: Kconfig.socs: Add comments
  riscv: Kconfig.erratas: Add comments
  ...
parents ea0c3926 ba6cfef0
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+35 −12
Original line number Diff line number Diff line
@@ -223,6 +223,21 @@ source "arch/riscv/Kconfig.erratas"

menu "Platform type"

config NONPORTABLE
	bool "Allow configurations that result in non-portable kernels"
	help
	  RISC-V kernel binaries are compatible between all known systems
	  whenever possible, but there are some use cases that can only be
	  satisfied by configurations that result in kernel binaries that are
	  not portable between systems.

	  Selecting N does not guarantee kernels will be portable to all known
	  systems.  Selecting any of the options guarded by NONPORTABLE will
	  result in kernel binaries that are unlikely to be portable between
	  systems.

	  If unsure, say N.

choice
	prompt "Base ISA"
	default ARCH_RV64I
@@ -232,6 +247,7 @@ choice

config ARCH_RV32I
	bool "RV32I"
	depends on NONPORTABLE
	select 32BIT
	select GENERIC_LIB_ASHLDI3
	select GENERIC_LIB_ASHRDI3
@@ -385,7 +401,7 @@ config FPU

	  If you don't know what to do here, say Y.

endmenu
endmenu # "Platform type"

menu "Kernel features"

@@ -474,7 +490,7 @@ config COMPAT

	  If you want to execute 32-bit userspace applications, say Y.

endmenu
endmenu # "Kernel features"

menu "Boot options"

@@ -510,7 +526,6 @@ config CMDLINE_EXTEND
	  cases where the provided arguments are insufficient and
	  you don't want to or cannot modify them.


config CMDLINE_FORCE
	bool "Always use the default kernel command string"
	help
@@ -553,6 +568,7 @@ config STACKPROTECTOR_PER_TASK

config PHYS_RAM_BASE_FIXED
	bool "Explicitly specified physical RAM address"
	depends on NONPORTABLE
	default n

config PHYS_RAM_BASE
@@ -566,7 +582,7 @@ config PHYS_RAM_BASE

config XIP_KERNEL
	bool "Kernel Execute-In-Place from ROM"
	depends on MMU && SPARSEMEM
	depends on MMU && SPARSEMEM && NONPORTABLE
	# This prevents XIP from being enabled by all{yes,mod}config, which
	# fail to build since XIP doesn't support large kernels.
	depends on !COMPILE_TEST
@@ -602,23 +618,30 @@ config XIP_PHYS_ADDR
	  be linked for and stored to.  This address is dependent on your
	  own flash usage.

endmenu
endmenu # "Boot options"

config BUILTIN_DTB
	bool
	depends on OF
	depends on OF && NONPORTABLE
	default y if XIP_KERNEL

config PORTABLE
	bool
	default !NONPORTABLE
	select EFI
	select OF
	select MMU

menu "Power management options"

source "kernel/power/Kconfig"

endmenu
endmenu # "Power management options"

menu "CPU Power Management"

source "drivers/cpuidle/Kconfig"

endmenu
endmenu # "CPU Power Management"

source "arch/riscv/kvm/Kconfig"
+1 −1
Original line number Diff line number Diff line
@@ -55,4 +55,4 @@ config ERRATA_THEAD_PBMT

	  If you don't know what to do here, say "Y".

endmenu
endmenu # "CPU errata selection"
+2 −2
Original line number Diff line number Diff line
@@ -78,6 +78,6 @@ config SOC_CANAAN_K210_DTB_SOURCE
	  for the DTS file that will be used to produce the DTB linked into the
	  kernel.

endif
endif # SOC_CANAAN

endmenu
endmenu # "SoC selection"
+12 −0
Original line number Diff line number Diff line
@@ -65,6 +65,18 @@
				compatible = "riscv,cpu-intc";
			};
		};

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};

				core1 {
					cpu = <&cpu1>;
				};
			};
		};
	};

	sram: memory@80000000 {
+24 −3
Original line number Diff line number Diff line
@@ -142,6 +142,30 @@
				interrupt-controller;
			};
		};

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};

				core1 {
					cpu = <&cpu1>;
				};

				core2 {
					cpu = <&cpu2>;
				};

				core3 {
					cpu = <&cpu3>;
				};

				core4 {
					cpu = <&cpu4>;
				};
			};
		};
	};

	refclk: mssrefclk {
@@ -291,7 +315,6 @@
			interrupt-parent = <&plic>;
			interrupts = <54>;
			clocks = <&clkcfg CLK_SPI0>;
			spi-max-frequency = <25000000>;
			status = "disabled";
		};

@@ -303,7 +326,6 @@
			interrupt-parent = <&plic>;
			interrupts = <55>;
			clocks = <&clkcfg CLK_SPI1>;
			spi-max-frequency = <25000000>;
			status = "disabled";
		};

@@ -315,7 +337,6 @@
			interrupt-parent = <&plic>;
			interrupts = <85>;
			clocks = <&clkcfg CLK_QSPI>;
			spi-max-frequency = <25000000>;
			status = "disabled";
		};

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