Unverified Commit 4d0ef0a1 authored by Zhang Qilong's avatar Zhang Qilong Committed by Mark Brown
Browse files

spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe 



The pm_runtime_enable will increase power disable depth. Thus
a pairing decrement is needed on the error handling path to
keep it balanced according to context.

Fixes:73d5fe04 ("spi: cadence-quadspi: Remove spi_master_put() in probe failure path")

Signed-off-by: default avatarZhang Qilong <zhangqilong3@huawei.com>
Link: https://lore.kernel.org/r/20220924121310.78331-2-zhangqilong3@huawei.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a6bfc42f

drivers/spi/spi-cadence-quadspi.c

+2 −1
Original line number Diff line number Diff line
@@ -1619,7 +1619,7 @@ static int cqspi_probe(struct platform_device *pdev) 
	pm_runtime_enable(dev);

	ret = pm_runtime_resume_and_get(dev);

	if (ret < 0)

		return ret;

		goto probe_pm_failed;



	ret = clk_prepare_enable(cqspi->clk);

	if (ret) {
@@ -1712,6 +1712,7 @@ static int cqspi_probe(struct platform_device *pdev) 
	clk_disable_unprepare(cqspi->clk);

probe_clk_failed:

	pm_runtime_put_sync(dev);

probe_pm_failed:

	pm_runtime_disable(dev);

	return ret;

}