Loading Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt +12 −6 Original line number Diff line number Diff line Loading @@ -12,24 +12,30 @@ Required properties: - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc - reg : Offset and length of the register set for the device - interrupts : Should contain CSPI/eCSPI interrupt - cs-gpios : Specifies the gpio pins to be used for chipselects. - clocks : Clock specifiers for both ipg and per clocks. - clock-names : Clock names should include both "ipg" and "per" See the clock consumer binding, Documentation/devicetree/bindings/clock/clock-bindings.txt - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt - dma-names: DMA request names should include "tx" and "rx" if present. Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect Recommended properties: - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip select lines can be used, they appear to always generate a pulse between each word of a transfer. Most use cases will require GPIO based chip selects to generate a valid transaction. Optional properties: - num-cs : Number of total chip selects, see spi-bus.txt. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt. - dma-names: DMA request names, if present, should include "tx" and "rx". - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register controlling the SPI_READY handling. Note that to enable the DRCTL consideration, the SPI_READY mode-flag needs to be set too. Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect Example: ecspi@70010000 { Loading drivers/spi/spi-armada-3700.c +8 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,7 @@ #define A3700_SPI_BYTE_LEN BIT(5) #define A3700_SPI_CLK_PRESCALE BIT(0) #define A3700_SPI_CLK_PRESCALE_MASK (0x1f) #define A3700_SPI_CLK_EVEN_OFFS (0x10) #define A3700_SPI_WFIFO_THRS_BIT 28 #define A3700_SPI_RFIFO_THRS_BIT 24 Loading Loading @@ -220,6 +221,13 @@ static void a3700_spi_clock_set(struct a3700_spi *a3700_spi, prescale = DIV_ROUND_UP(clk_get_rate(a3700_spi->clk), speed_hz); /* For prescaler values over 15, we can only set it by steps of 2. * Starting from A3700_SPI_CLK_EVEN_OFFS, we set values from 0 up to * 30. We only use this range from 16 to 30. */ if (prescale > 15) prescale = A3700_SPI_CLK_EVEN_OFFS + DIV_ROUND_UP(prescale, 2); val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG); val = val & ~A3700_SPI_CLK_PRESCALE_MASK; Loading drivers/spi/spi-atmel.c +1 −1 Original line number Diff line number Diff line Loading @@ -1661,12 +1661,12 @@ static int atmel_spi_remove(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); /* reset the hardware and block queue progress */ spin_lock_irq(&as->lock); if (as->use_dma) { atmel_spi_stop_dma(master); atmel_spi_release_dma(master); } spin_lock_irq(&as->lock); spi_writel(as, CR, SPI_BIT(SWRST)); spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ spi_readl(as, SR); Loading drivers/spi/spi-rspi.c +2 −2 Original line number Diff line number Diff line Loading @@ -377,8 +377,8 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size) /* Sets SPCMD */ rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0); /* Enables SPI function in master mode */ rspi_write8(rspi, SPCR_SPE | SPCR_MSTR, RSPI_SPCR); /* Sets RSPI mode */ rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR); return 0; } Loading drivers/spi/spi-sun4i.c +1 −1 Original line number Diff line number Diff line Loading @@ -525,7 +525,7 @@ static int sun4i_spi_probe(struct platform_device *pdev) static int sun4i_spi_remove(struct platform_device *pdev) { pm_runtime_disable(&pdev->dev); pm_runtime_force_suspend(&pdev->dev); return 0; } Loading Loading
Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt +12 −6 Original line number Diff line number Diff line Loading @@ -12,24 +12,30 @@ Required properties: - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc - reg : Offset and length of the register set for the device - interrupts : Should contain CSPI/eCSPI interrupt - cs-gpios : Specifies the gpio pins to be used for chipselects. - clocks : Clock specifiers for both ipg and per clocks. - clock-names : Clock names should include both "ipg" and "per" See the clock consumer binding, Documentation/devicetree/bindings/clock/clock-bindings.txt - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt - dma-names: DMA request names should include "tx" and "rx" if present. Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect Recommended properties: - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip select lines can be used, they appear to always generate a pulse between each word of a transfer. Most use cases will require GPIO based chip selects to generate a valid transaction. Optional properties: - num-cs : Number of total chip selects, see spi-bus.txt. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt. - dma-names: DMA request names, if present, should include "tx" and "rx". - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register controlling the SPI_READY handling. Note that to enable the DRCTL consideration, the SPI_READY mode-flag needs to be set too. Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect Example: ecspi@70010000 { Loading
drivers/spi/spi-armada-3700.c +8 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,7 @@ #define A3700_SPI_BYTE_LEN BIT(5) #define A3700_SPI_CLK_PRESCALE BIT(0) #define A3700_SPI_CLK_PRESCALE_MASK (0x1f) #define A3700_SPI_CLK_EVEN_OFFS (0x10) #define A3700_SPI_WFIFO_THRS_BIT 28 #define A3700_SPI_RFIFO_THRS_BIT 24 Loading Loading @@ -220,6 +221,13 @@ static void a3700_spi_clock_set(struct a3700_spi *a3700_spi, prescale = DIV_ROUND_UP(clk_get_rate(a3700_spi->clk), speed_hz); /* For prescaler values over 15, we can only set it by steps of 2. * Starting from A3700_SPI_CLK_EVEN_OFFS, we set values from 0 up to * 30. We only use this range from 16 to 30. */ if (prescale > 15) prescale = A3700_SPI_CLK_EVEN_OFFS + DIV_ROUND_UP(prescale, 2); val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG); val = val & ~A3700_SPI_CLK_PRESCALE_MASK; Loading
drivers/spi/spi-atmel.c +1 −1 Original line number Diff line number Diff line Loading @@ -1661,12 +1661,12 @@ static int atmel_spi_remove(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); /* reset the hardware and block queue progress */ spin_lock_irq(&as->lock); if (as->use_dma) { atmel_spi_stop_dma(master); atmel_spi_release_dma(master); } spin_lock_irq(&as->lock); spi_writel(as, CR, SPI_BIT(SWRST)); spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ spi_readl(as, SR); Loading
drivers/spi/spi-rspi.c +2 −2 Original line number Diff line number Diff line Loading @@ -377,8 +377,8 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size) /* Sets SPCMD */ rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0); /* Enables SPI function in master mode */ rspi_write8(rspi, SPCR_SPE | SPCR_MSTR, RSPI_SPCR); /* Sets RSPI mode */ rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR); return 0; } Loading
drivers/spi/spi-sun4i.c +1 −1 Original line number Diff line number Diff line Loading @@ -525,7 +525,7 @@ static int sun4i_spi_probe(struct platform_device *pdev) static int sun4i_spi_remove(struct platform_device *pdev) { pm_runtime_disable(&pdev->dev); pm_runtime_force_suspend(&pdev->dev); return 0; } Loading