Commit 4cdadfd5 authored by Dan Williams's avatar Dan Williams
Browse files

cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints 



The CXL.mem protocol allows a device to act as a provider of "System
RAM" and/or "Persistent Memory" that is fully coherent as if the memory
was attached to the typical CPU memory controller.

With the CXL-2.0 specification a PCI endpoint can implement a "Type-3"
device interface and give the operating system control over "Host
Managed Device Memory". See section 2.3 Type 3 CXL Device.

The memory range exported by the device may optionally be described by
the platform firmware memory map, or by infrastructure like LIBNVDIMM to
provision persistent memory capacity from one, or more, CXL.mem devices.

A pre-requisite for Linux-managed memory-capacity provisioning is this
cxl_mem driver that can speak the mailbox protocol defined in section
8.2.8.4 Mailbox Registers.

For now just land the initial driver boiler-plate and Documentation/
infrastructure.

Signed-off-by: default avatarBen Widawsky <ben.widawsky@intel.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: David Rientjes <rientjes@google.com> (v1)
Cc: Jonathan Corbet <corbet@lwn.net>
Link: https://www.computeexpresslink.org/download-the-specification
Link: https://lore.kernel.org/r/20210217040958.1354670-2-ben.widawsky@intel.com


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 1048ba83

Documentation/driver-api/cxl/index.rst

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.. SPDX-License-Identifier: GPL-2.0



====================

Compute Express Link

====================



.. toctree::

   :maxdepth: 1



   memory-devices



.. only::  subproject and html

Documentation/driver-api/cxl/memory-devices.rst

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.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



===================================

Compute Express Link Memory Devices

===================================



A Compute Express Link Memory Device is a CXL component that implements the

CXL.mem protocol. It contains some amount of volatile memory, persistent memory,

or both. It is enumerated as a PCI device for configuration and passing

messages over an MMIO mailbox. Its contribution to the System Physical

Address space is handled via HDM (Host Managed Device Memory) decoders

that optionally define a device's contribution to an interleaved address

range across multiple devices underneath a host-bridge or interleaved

across host-bridges.

Documentation/driver-api/index.rst

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@@ -35,6 +35,7 @@ available subsections can be seen below. 
   usb/index

   firewire

   pci/index

   cxl/index

   spi

   i2c

   ipmb

drivers/Kconfig

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@@ -6,6 +6,7 @@ menu "Device Drivers" 
source "drivers/amba/Kconfig"

source "drivers/eisa/Kconfig"

source "drivers/pci/Kconfig"

source "drivers/cxl/Kconfig"

source "drivers/pcmcia/Kconfig"

source "drivers/rapidio/Kconfig"

drivers/Makefile

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@@ -73,6 +73,7 @@ obj-$(CONFIG_NVM) += lightnvm/ 
obj-y				+= base/ block/ misc/ mfd/ nfc/

obj-$(CONFIG_LIBNVDIMM)		+= nvdimm/

obj-$(CONFIG_DAX)		+= dax/

obj-$(CONFIG_CXL_BUS)		+= cxl/

obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf/

obj-$(CONFIG_NUBUS)		+= nubus/

obj-y				+= macintosh/