Commit 4c63c923 authored by Jim Mattson's avatar Jim Mattson Committed by Paolo Bonzini
Browse files

KVM: selftests: Hoist APIC functions out of individual tests 



Move the APIC functions into the library to encourage code reuse and
to avoid unintended deviations.

Signed-off-by: default avatarJim Mattson <jmattson@google.com>
Reviewed-by: default avatarOliver Upton <oupton@google.com>
Message-Id: <20210604172611.281819-10-jmattson@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 150a282d

tools/testing/selftests/kvm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ ifeq ($(ARCH),s390) 
endif



LIBKVM = lib/assert.c lib/elf.c lib/io.c lib/kvm_util.c lib/rbtree.c lib/sparsebit.c lib/test_util.c lib/guest_modes.c lib/perf_test_util.c

LIBKVM_x86_64 = lib/x86_64/processor.c lib/x86_64/vmx.c lib/x86_64/svm.c lib/x86_64/ucall.c lib/x86_64/handlers.S

LIBKVM_x86_64 = lib/x86_64/apic.c lib/x86_64/processor.c lib/x86_64/vmx.c lib/x86_64/svm.c lib/x86_64/ucall.c lib/x86_64/handlers.S

LIBKVM_aarch64 = lib/aarch64/processor.c lib/aarch64/ucall.c

LIBKVM_s390x = lib/s390x/processor.c lib/s390x/ucall.c lib/s390x/diag318_test_handler.c

tools/testing/selftests/kvm/include/x86_64/apic.h

+23 −0
Original line number Diff line number Diff line
@@ -8,6 +8,10 @@ 
#ifndef SELFTEST_KVM_APIC_H

#define SELFTEST_KVM_APIC_H



#include <stdint.h>



#include "processor.h"



#define APIC_DEFAULT_GPA		0xfee00000ULL



/* APIC base address MSR and fields */
@@ -55,4 +59,23 @@ 
#define	APIC_ICR2	0x310

#define		SET_APIC_DEST_FIELD(x)	((x) << 24)



void apic_disable(void);

void xapic_enable(void);

void x2apic_enable(void);



static inline uint32_t get_bsp_flag(void)

{

	return rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_BSP;

}



static inline uint32_t xapic_read_reg(unsigned int reg)

{

	return ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2];

}



static inline void xapic_write_reg(unsigned int reg, uint32_t val)

{

	((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;

}



#endif /* SELFTEST_KVM_APIC_H */

tools/testing/selftests/kvm/include/x86_64/processor.h

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ 


#include <asm/msr-index.h>



#include "../kvm_util.h"



#define X86_EFLAGS_FIXED	 (1u << 1)



#define X86_CR4_VME		(1ul << 0)

tools/testing/selftests/kvm/lib/x86_64/apic.c

0 → 100644
+46 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * tools/testing/selftests/kvm/lib/x86_64/processor.c

 *

 * Copyright (C) 2021, Google LLC.

 */



#include "apic.h"



void apic_disable(void)

{

	wrmsr(MSR_IA32_APICBASE,

	      rdmsr(MSR_IA32_APICBASE) &

		~(MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD));

}



void xapic_enable(void)

{

	uint64_t val = rdmsr(MSR_IA32_APICBASE);



	/* Per SDM: to enable xAPIC when in x2APIC must first disable APIC */

	if (val & MSR_IA32_APICBASE_EXTD) {

		apic_disable();

		wrmsr(MSR_IA32_APICBASE,

		      rdmsr(MSR_IA32_APICBASE) | MSR_IA32_APICBASE_ENABLE);

	} else if (!(val & MSR_IA32_APICBASE_ENABLE)) {

		wrmsr(MSR_IA32_APICBASE, val | MSR_IA32_APICBASE_ENABLE);

	}



	/*

	 * Per SDM: reset value of spurious interrupt vector register has the

	 * APIC software enabled bit=0. It must be enabled in addition to the

	 * enable bit in the MSR.

	 */

	val = xapic_read_reg(APIC_SPIV) | APIC_SPIV_APIC_ENABLED;

	xapic_write_reg(APIC_SPIV, val);

}



void x2apic_enable(void)

{

	uint32_t spiv_reg = APIC_BASE_MSR + (APIC_SPIV >> 4);



	wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |

	      MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD);

	wrmsr(spiv_reg, rdmsr(spiv_reg) | APIC_SPIV_APIC_ENABLED);

}

tools/testing/selftests/kvm/x86_64/evmcs_test.c

+1 −10
Original line number Diff line number Diff line
@@ -22,15 +22,6 @@ 


static int ud_count;



void enable_x2apic(void)

{

	uint32_t spiv_reg = APIC_BASE_MSR + (APIC_SPIV >> 4);



	wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |

	      MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD);

	wrmsr(spiv_reg, rdmsr(spiv_reg) | APIC_SPIV_APIC_ENABLED);

}



static void guest_ud_handler(struct ex_regs *regs)

{

	ud_count++;
@@ -59,7 +50,7 @@ void guest_code(struct vmx_pages *vmx_pages) 
#define L2_GUEST_STACK_SIZE 64

	unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE];



	enable_x2apic();

	x2apic_enable();



	GUEST_SYNC(1);

	GUEST_SYNC(2);