Commit 4bf07f65 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

timekeeping, clocksource: Fix various typos in comments 



Fix ~56 single-word typos in timekeeping & clocksource code comments.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-kernel@vger.kernel.org
parent 44511ab3

drivers/clocksource/clksrc-dbx500-prcmu.c

+4 −4
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 


#define RATE_32K		32768



#define TIMER_MODE_CONTINOUS	0x1

#define TIMER_MODE_CONTINUOUS	0x1

#define TIMER_DOWNCOUNT_VAL	0xffffffff



#define PRCMU_TIMER_REF		0
@@ -55,13 +55,13 @@ static int __init clksrc_dbx500_prcmu_init(struct device_node *node) 


	/*

	 * The A9 sub system expects the timer to be configured as

	 * a continous looping timer.

	 * a continuous looping timer.

	 * The PRCMU should configure it but if it for some reason

	 * don't we do it here.

	 */

	if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=

	    TIMER_MODE_CONTINOUS) {

		writel(TIMER_MODE_CONTINOUS,

	    TIMER_MODE_CONTINUOUS) {

		writel(TIMER_MODE_CONTINUOUS,

		       clksrc_dbx500_timer_base + PRCMU_TIMER_MODE);

		writel(TIMER_DOWNCOUNT_VAL,

		       clksrc_dbx500_timer_base + PRCMU_TIMER_REF);

drivers/clocksource/dw_apb_timer_of.c

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ static int __init timer_get_base_and_rate(struct device_node *np, 
	}



	/*

	 * Not all implementations use a periphal clock, so don't panic

	 * Not all implementations use a peripheral clock, so don't panic

	 * if it's not present

	 */

	pclk = of_clk_get_by_name(np, "pclk");

drivers/clocksource/hyperv_timer.c

+1 −1
Original line number Diff line number Diff line
@@ -457,7 +457,7 @@ void __init hv_init_clocksource(void) 
{

	/*

	 * Try to set up the TSC page clocksource. If it succeeds, we're

	 * done. Otherwise, set up the MSR clocksoruce.  At least one of

	 * done. Otherwise, set up the MSR clocksource.  At least one of

	 * these will always be available except on very old versions of

	 * Hyper-V on x86.  In that case we won't have a Hyper-V

	 * clocksource, but Linux will still run with a clocksource based

drivers/clocksource/timer-atmel-tcb.c

+2 −2
Original line number Diff line number Diff line
@@ -455,9 +455,9 @@ static int __init tcb_clksrc_init(struct device_node *node) 
	tcaddr = tc.regs;



	if (bits == 32) {

		/* use apropriate function to read 32 bit counter */

		/* use appropriate function to read 32 bit counter */

		clksrc.read = tc_get_cycles32;

		/* setup ony channel 0 */

		/* setup only channel 0 */

		tcb_setup_single_chan(&tc, best_divisor_idx);

		tc_sched_clock = tc_sched_clock_read32;

		tc_delay_timer.read_current_timer = tc_delay_timer_read32;

drivers/clocksource/timer-fsl-ftm.c

+1 −1
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ static int ftm_set_next_event(unsigned long delta, 
	 * to the MOD register latches the value into a buffer. The MOD

	 * register is updated with the value of its write buffer with

	 * the following scenario:

	 * a, the counter source clock is diabled.

	 * a, the counter source clock is disabled.

	 */

	ftm_counter_disable(priv->clkevt_base);