Commit 4bebe324 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'intel-cleanups' 



Guangbin Huang says:

====================
net: intel: some cleanups

This patchset adds some cleanups for intel e1000/e1000e ethernet driver.
====================

Reviewed-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 798c04f6 0d27895b

drivers/net/ethernet/intel/e1000/e1000_hw.c

+2 −2
Original line number Diff line number Diff line
@@ -2522,7 +2522,7 @@ s32 e1000_check_for_link(struct e1000_hw *hw) 
				 * turn it on. For compatibility with a TBI link

				 * partner, we will store bad packets. Some

				 * frames have an additional byte on the end and

				 * will look like CRC errors to to the hardware.

				 * will look like CRC errors to the hardware.

				 */

				if (!hw->tbi_compatibility_on) {

					hw->tbi_compatibility_on = true;
@@ -2723,7 +2723,7 @@ static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count) 
 * e1000_shift_in_mdi_bits - Shifts data bits in from the PHY

 * @hw: Struct containing variables accessed by shared code

 *

 * Bits are shifted in in MSB to LSB order.

 * Bits are shifted in MSB to LSB order.

 */

static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw)

{

drivers/net/ethernet/intel/e1000/e1000_main.c

+1 −1
Original line number Diff line number Diff line
@@ -5245,7 +5245,7 @@ static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 
	if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))

		pci_disable_device(pdev);



	/* Request a slot slot reset. */

	/* Request a slot reset. */

	return PCI_ERS_RESULT_NEED_RESET;

}

drivers/net/ethernet/intel/e1000e/ich8lan.c

+1 −1
Original line number Diff line number Diff line
@@ -4639,7 +4639,7 @@ static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw) 
 *  @hw: pointer to the HW structure

 *

 *  ICH8 use the PCI Express bus, but does not contain a PCI Express Capability

 *  register, so the the bus width is hard coded.

 *  register, so the bus width is hard coded.

 **/

static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)

{

drivers/net/ethernet/intel/e1000e/netdev.c

+1 −1
Original line number Diff line number Diff line
@@ -7118,7 +7118,7 @@ static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 


	pci_disable_device(pdev);



	/* Request a slot slot reset. */

	/* Request a slot reset. */

	return PCI_ERS_RESULT_NEED_RESET;

}

drivers/net/ethernet/intel/e1000e/phy.c

+1 −1
Original line number Diff line number Diff line
@@ -2978,7 +2978,7 @@ static u32 e1000_get_phy_addr_for_hv_page(u32 page) 
 *  @data: pointer to the data to be read or written

 *  @read: determines if operation is read or write

 *

 *  Reads the PHY register at offset and stores the retreived information

 *  Reads the PHY register at offset and stores the retrieved information

 *  in data.  Assumes semaphore already acquired.  Note that the procedure

 *  to access these regs uses the address port and data port to read/write.

 *  These accesses done with PHY address 2 and without using pages.