Commit 4bdb1192 authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo
Browse files

arm64: dts: imx8mp: add GPU nodes 



Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.

etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
[drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Tested-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent fc0f0512

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -933,6 +933,37 @@ 
			};

		};



		gpu3d: gpu@38000000 {

			compatible = "vivante,gc";

			reg = <0x38000000 0x8000>;

			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk IMX8MP_CLK_GPU3D_ROOT>,

				 <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>,

				 <&clk IMX8MP_CLK_GPU_ROOT>,

				 <&clk IMX8MP_CLK_GPU_AHB>;

			clock-names = "core", "shader", "bus", "reg";

			assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,

					  <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;

			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,

						 <&clk IMX8MP_SYS_PLL1_800M>;

			assigned-clock-rates = <800000000>, <800000000>;

			power-domains = <&pgc_gpu3d>;

		};



		gpu2d: gpu@38008000 {

			compatible = "vivante,gc";

			reg = <0x38008000 0x8000>;

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk IMX8MP_CLK_GPU2D_ROOT>,

				 <&clk IMX8MP_CLK_GPU_ROOT>,

				 <&clk IMX8MP_CLK_GPU_AHB>;

			clock-names = "core", "bus", "reg";

			assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;

			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;

			assigned-clock-rates = <800000000>;

			power-domains = <&pgc_gpu2d>;

		};



		gic: interrupt-controller@38800000 {

			compatible = "arm,gic-v3";

			reg = <0x38800000 0x10000>,