Commit 4bbe52d9 authored by Huazhong Tan's avatar Huazhong Tan Committed by Zheng Zengkai
Browse files

net: hns3: add support to query tx spare buffer size for pf 

mainline inclusion
from mainline-master
commit 1a00197b
category: feature
bugzilla: 173966
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=1a00197b7d2fe57f0be93037d5090e19a9b178c8



----------------------------------------------------------------------

Add support to query tx spare buffer size from configuration
file, and use this info to do spare buffer initialization when
the module parameter 'tx_spare_buf_size' is not specified.

Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Reviewed-by: default avatarYongxin Li <liyongxin1@huawei.com>
Signed-off-by: default avatarJunxin Chen <chenjunxin1@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 3dd7206f

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+1 −0
Original line number Diff line number Diff line
@@ -759,6 +759,7 @@ struct hnae3_knic_private_info { 
	u16 rx_buf_len;

	u16 num_tx_desc;

	u16 num_rx_desc;

	u32 tx_spare_buf_size;



	struct hnae3_tc_info tc_info;

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+5 −2
Original line number Diff line number Diff line
@@ -1005,13 +1005,16 @@ static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring) 
{

	struct hns3_tx_spare *tx_spare;

	struct page *page;

	u32 alloc_size;

	dma_addr_t dma;

	int order;



	if (!tx_spare_buf_size)

	alloc_size = tx_spare_buf_size ? tx_spare_buf_size :

		     ring->tqp->handle->kinfo.tx_spare_buf_size;

	if (!alloc_size)

		return;



	order = get_order(tx_spare_buf_size);

	order = get_order(alloc_size);

	tx_spare = devm_kzalloc(ring_to_dev(ring), sizeof(*tx_spare),

				GFP_KERNEL);

	if (!tx_spare) {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+2 −0
Original line number Diff line number Diff line
@@ -542,6 +542,8 @@ struct hclge_pf_res_cmd { 
#define HCLGE_CFG_UMV_TBL_SPACE_M	GENMASK(31, 16)

#define HCLGE_CFG_PF_RSS_SIZE_S		0

#define HCLGE_CFG_PF_RSS_SIZE_M		GENMASK(3, 0)

#define HCLGE_CFG_TX_SPARE_BUF_SIZE_S	4

#define HCLGE_CFG_TX_SPARE_BUF_SIZE_M	GENMASK(15, 4)



#define HCLGE_CFG_CMD_CNT		4

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+14 −0
Original line number Diff line number Diff line
@@ -1279,6 +1279,7 @@ static u32 hclge_get_max_speed(u16 speed_ability) 


static void hclge_parse_cfg(struct hclge_cfg *cfg, struct hclge_desc *desc)

{

#define HCLGE_TX_SPARE_SIZE_UNIT		4096

#define SPEED_ABILITY_EXT_SHIFT			8



	struct hclge_cfg_param_cmd *req;
@@ -1358,6 +1359,15 @@ static void hclge_parse_cfg(struct hclge_cfg *cfg, struct hclge_desc *desc) 
	cfg->pf_rss_size_max = cfg->pf_rss_size_max ?

			       1U << cfg->pf_rss_size_max :

			       cfg->vf_rss_size_max;



	/* The unit of the tx spare buffer size queried from configuration

	 * file is HCLGE_TX_SPARE_SIZE_UNIT(4096) bytes, so a conversion is

	 * needed here.

	 */

	cfg->tx_spare_buf_size = hnae3_get_field(__le32_to_cpu(req->param[2]),

						 HCLGE_CFG_TX_SPARE_BUF_SIZE_M,

						 HCLGE_CFG_TX_SPARE_BUF_SIZE_S);

	cfg->tx_spare_buf_size *= HCLGE_TX_SPARE_SIZE_UNIT;

}



/* hclge_get_cfg: query the static parameter from flash
@@ -1539,6 +1549,7 @@ static int hclge_configure(struct hclge_dev *hdev) 
	hdev->tc_max = cfg.tc_num;

	hdev->tm_info.hw_pfc_map = 0;

	hdev->wanted_umv_size = cfg.umv_space;

	hdev->tx_spare_buf_size = cfg.tx_spare_buf_size;

	if (cfg.vlan_fliter_cap == HCLGE_VLAN_FLTR_CAN_MDF)

		set_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps);
@@ -1736,6 +1747,7 @@ static int hclge_knic_setup(struct hclge_vport *vport, u16 num_tqps, 
	kinfo->num_rx_desc = num_rx_desc;



	kinfo->rx_buf_len = hdev->rx_buf_len;

	kinfo->tx_spare_buf_size = hdev->tx_spare_buf_size;



	kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, num_tqps,

				  sizeof(struct hnae3_queue *), GFP_KERNEL);
@@ -11059,6 +11071,8 @@ static void hclge_info_show(struct hclge_dev *hdev) 
		 hdev->flag & HCLGE_FLAG_DCB_ENABLE ? "enable" : "disable");

	dev_info(dev, "MQPRIO %s\n",

		 hdev->flag & HCLGE_FLAG_MQPRIO_ENABLE ? "enable" : "disable");

	dev_info(dev, "Default tx spare buffer size: %u\n",

		 hdev->tx_spare_buf_size);



	dev_info(dev, "PF info end.\n");

}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

+2 −0
Original line number Diff line number Diff line
@@ -384,6 +384,7 @@ struct hclge_cfg { 
	u8 mac_addr[ETH_ALEN];

	u8 default_speed;

	u32 numa_node_map;

	u32 tx_spare_buf_size;

	u16 speed_ability;

	u16 umv_space;

};
@@ -848,6 +849,7 @@ struct hclge_dev { 
	u16 alloc_rss_size;		/* Allocated RSS task queue */

	u16 vf_rss_size_max;		/* HW defined VF max RSS task queue */

	u16 pf_rss_size_max;		/* HW defined PF max RSS task queue */

	u32 tx_spare_buf_size;		/* HW defined TX spare buffer size */



	u16 fdir_pf_filter_count; /* Num of guaranteed filters for this PF */

	u16 num_alloc_vport;		/* Num vports this driver supports */