Commit 4b96c5d7 authored by Yicong Yang's avatar Yicong Yang Committed by zhangyuyang
Browse files

drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting 

maillist inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IAQG4N
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/commit/?id=17bf68aeb3642221e3e770399b5a52f370747ac1



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We make the initial value of event ctrl register as HISI_PCIE_INIT_SET
and modify according to the user options. This will make TLP headers
bandwidth only counting never take effect since HISI_PCIE_INIT_SET
configures to count the TLP payloads bandwidth. Fix this by making
the initial value of event ctrl register as 0.

Fixes: 17d57398 ("drivers/perf: hisi: Add TLP filter support")
Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240829090332.28756-3-yangyicong@huawei.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarzhangyuyang <zhangyuyang31@huawei.com>
parent d036edb2

drivers/perf/hisilicon/hisi_pcie_pmu.c

+1 −1
Original line number Diff line number Diff line
@@ -219,7 +219,7 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, 
static u64 hisi_pcie_pmu_get_event_ctrl_val(struct perf_event *event)

{

	u64 port, trig_len, thr_len, len_mode;

	u64 reg = HISI_PCIE_INIT_SET;

	u64 reg = 0;



	/* Config HISI_PCIE_EVENT_CTRL according to event. */

	reg |= FIELD_PREP(HISI_PCIE_EVENT_M, hisi_pcie_get_real_event(event));