Commit 4b7786d8 authored by Liu, Zhan's avatar Liu, Zhan Committed by Alex Deucher
Browse files

drm/amd/display: Fix DCN3 B0 DP Alt Mapping 



[Why]
DCN3 B0 has a mux, which redirects PHYC and PHYD to PHYF and PHYG.

[How]
Fix DIG mapping.

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarZhan Liu <Zhan.Liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d51fc42a

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

+6 −0
Original line number Diff line number Diff line
@@ -1383,6 +1383,12 @@ static struct stream_encoder *dcn31_stream_encoder_create( 
		return NULL;

	}



	if (ctx->asic_id.chip_family == FAMILY_YELLOW_CARP &&

			ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) {

		if ((eng_id == ENGINE_ID_DIGC) || (eng_id == ENGINE_ID_DIGD))

			eng_id = eng_id + 3; // For B0 only. C->F, D->G.

	}



	dcn30_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios,

					eng_id, vpg, afmt,

					&stream_enc_regs[eng_id],