Commit 4b51210f authored by Haridhar Kalvala's avatar Haridhar Kalvala Committed by Matt Roper
Browse files

drm/i915/mtl: Add Wa_14017856879 



Wa_14017856879 implementation for mtl.

Bspec: 46046

Signed-off-by: default avatarHaridhar Kalvala <haridhar.kalvala@intel.com>
Reviewed-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230404173220.3175577-1-haridhar.kalvala@intel.com
parent aa7b93eb

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+2 −0
Original line number Diff line number Diff line
@@ -1179,7 +1179,9 @@ 
#define   THREAD_EX_ARB_MODE_RR_AFTER_DEP	REG_FIELD_PREP(THREAD_EX_ARB_MODE, 0x2)



#define HSW_ROW_CHICKEN3			_MMIO(0xe49c)

#define GEN9_ROW_CHICKEN3			MCR_REG(0xe49c)

#define   HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE	(1 << 6)

#define   MTL_DISABLE_FIX_FOR_EOT_FLUSH		REG_BIT(9)



#define GEN8_ROW_CHICKEN			MCR_REG(0xe4f0)

#define   FLOW_CONTROL_ENABLE			REG_BIT(15)

drivers/gpu/drm/i915/gt/intel_workarounds.c

+5 −0
Original line number Diff line number Diff line
@@ -3051,6 +3051,11 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li 


	add_render_compute_tuning_settings(i915, wal);



	if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_B0, STEP_FOREVER) ||

	    IS_MTL_GRAPHICS_STEP(i915, P, STEP_B0, STEP_FOREVER))

		/* Wa_14017856879 */

		wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN3, MTL_DISABLE_FIX_FOR_EOT_FLUSH);



	if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_A0, STEP_B0) ||

	    IS_MTL_GRAPHICS_STEP(i915, P, STEP_A0, STEP_B0))

		/*