Commit 4b2b2ee1 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2022-07-20-1' of...

Merge tag 'drm-intel-fixes-2022-07-20-1' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

- Fix the regression caused by the lack of GuC v70.
  Let's accept the fallback to v69.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YtgguaR5JYK083oZ@intel.com
parents ff699273 44314885
Loading
Loading
Loading
Loading
+9 −2
Original line number Diff line number Diff line
@@ -273,10 +273,17 @@ struct intel_context {
		u8 child_index;
		/** @guc: GuC specific members for parallel submission */
		struct {
			/** @wqi_head: head pointer in work queue */
			/** @wqi_head: cached head pointer in work queue */
			u16 wqi_head;
			/** @wqi_tail: tail pointer in work queue */
			/** @wqi_tail: cached tail pointer in work queue */
			u16 wqi_tail;
			/** @wq_head: pointer to the actual head in work queue */
			u32 *wq_head;
			/** @wq_tail: pointer to the actual head in work queue */
			u32 *wq_tail;
			/** @wq_status: pointer to the status in work queue */
			u32 *wq_status;

			/**
			 * @parent_page: page in context state (ce->state) used
			 * by parent for work queue, process descriptor
+11 −1
Original line number Diff line number Diff line
@@ -661,6 +661,16 @@ static inline void execlists_schedule_out(struct i915_request *rq)
	i915_request_put(rq);
}

static u32 map_i915_prio_to_lrc_desc_prio(int prio)
{
	if (prio > I915_PRIORITY_NORMAL)
		return GEN12_CTX_PRIORITY_HIGH;
	else if (prio < I915_PRIORITY_NORMAL)
		return GEN12_CTX_PRIORITY_LOW;
	else
		return GEN12_CTX_PRIORITY_NORMAL;
}

static u64 execlists_update_context(struct i915_request *rq)
{
	struct intel_context *ce = rq->context;
@@ -669,7 +679,7 @@ static u64 execlists_update_context(struct i915_request *rq)

	desc = ce->lrc.desc;
	if (rq->engine->flags & I915_ENGINE_HAS_EU_PRIORITY)
		desc |= lrc_desc_priority(rq_prio(rq));
		desc |= map_i915_prio_to_lrc_desc_prio(rq_prio(rq));

	/*
	 * WaIdleLiteRestore:bdw,skl
+0 −10
Original line number Diff line number Diff line
@@ -111,16 +111,6 @@ enum {
#define XEHP_SW_COUNTER_SHIFT			58
#define XEHP_SW_COUNTER_WIDTH			6

static inline u32 lrc_desc_priority(int prio)
{
	if (prio > I915_PRIORITY_NORMAL)
		return GEN12_CTX_PRIORITY_HIGH;
	else if (prio < I915_PRIORITY_NORMAL)
		return GEN12_CTX_PRIORITY_LOW;
	else
		return GEN12_CTX_PRIORITY_NORMAL;
}

static inline void lrc_runtime_start(struct intel_context *ce)
{
	struct intel_context_stats *stats = &ce->stats;
+3 −0
Original line number Diff line number Diff line
@@ -122,6 +122,9 @@ enum intel_guc_action {
	INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
	INTEL_GUC_ACTION_SCHED_ENGINE_MODE_SET = 0x1003,
	INTEL_GUC_ACTION_SCHED_ENGINE_MODE_DONE = 0x1004,
	INTEL_GUC_ACTION_V69_SET_CONTEXT_PRIORITY = 0x1005,
	INTEL_GUC_ACTION_V69_SET_CONTEXT_EXECUTION_QUANTUM = 0x1006,
	INTEL_GUC_ACTION_V69_SET_CONTEXT_PREEMPTION_TIMEOUT = 0x1007,
	INTEL_GUC_ACTION_CONTEXT_RESET_NOTIFICATION = 0x1008,
	INTEL_GUC_ACTION_ENGINE_FAILURE_NOTIFICATION = 0x1009,
	INTEL_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES = 0x100B,
+5 −0
Original line number Diff line number Diff line
@@ -170,6 +170,11 @@ struct intel_guc {
	/** @ads_engine_usage_size: size of engine usage in the ADS */
	u32 ads_engine_usage_size;

	/** @lrc_desc_pool_v69: object allocated to hold the GuC LRC descriptor pool */
	struct i915_vma *lrc_desc_pool_v69;
	/** @lrc_desc_pool_vaddr_v69: contents of the GuC LRC descriptor pool */
	void *lrc_desc_pool_vaddr_v69;

	/**
	 * @context_lookup: used to resolve intel_context from guc_id, if a
	 * context is present in this structure it is registered with the GuC
Loading