Commit 4b296527 authored by John Clements's avatar John Clements Committed by Alex Deucher
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drm/amdgpu: added synchronization for psp cmd buf access



resolved race condition accessing psp cmd submission memory

Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9712ee0e
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+139 −66
Original line number Diff line number Diff line
@@ -426,8 +426,6 @@ psp_cmd_submit_buf(struct psp_context *psp,
	if (!drm_dev_enter(&psp->adev->ddev, &idx))
		return 0;

	mutex_lock(&psp->mutex);

	memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);

	memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp));
@@ -487,11 +485,26 @@ psp_cmd_submit_buf(struct psp_context *psp,
	}

exit:
	mutex_unlock(&psp->mutex);
	drm_dev_exit(idx);
	return ret;
}

static struct psp_gfx_cmd_resp *acquire_psp_cmd_buf(struct psp_context *psp)
{
	struct psp_gfx_cmd_resp *cmd = psp->cmd;

	mutex_lock(&psp->mutex);

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	return cmd;
}

void release_psp_cmd_buf(struct psp_context *psp)
{
	mutex_unlock(&psp->mutex);
}

static void psp_prep_tmr_cmd_buf(struct psp_context *psp,
				 struct psp_gfx_cmd_resp *cmd,
				 uint64_t tmr_mc, struct amdgpu_bo *tmr_bo)
@@ -500,8 +513,6 @@ static void psp_prep_tmr_cmd_buf(struct psp_context *psp,
	uint32_t size = amdgpu_bo_size(tmr_bo);
	uint64_t tmr_pa = amdgpu_gmc_vram_pa(adev, tmr_bo);

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	if (amdgpu_sriov_vf(psp->adev))
		cmd->cmd_id = GFX_CMD_ID_SETUP_VMR;
	else
@@ -517,8 +528,6 @@ static void psp_prep_tmr_cmd_buf(struct psp_context *psp,
static void psp_prep_load_toc_cmd_buf(struct psp_gfx_cmd_resp *cmd,
				      uint64_t pri_buf_mc, uint32_t size)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id = GFX_CMD_ID_LOAD_TOC;
	cmd->cmd.cmd_load_toc.toc_phy_addr_lo = lower_32_bits(pri_buf_mc);
	cmd->cmd.cmd_load_toc.toc_phy_addr_hi = upper_32_bits(pri_buf_mc);
@@ -530,7 +539,7 @@ static int psp_load_toc(struct psp_context *psp,
			uint32_t *tmr_size)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	/* Copy toc to psp firmware private buffer */
	psp_copy_fw(psp, psp->toc.start_addr, psp->toc.size_bytes);
@@ -542,6 +551,8 @@ static int psp_load_toc(struct psp_context *psp,
	if (!ret)
		*tmr_size = psp->cmd_buf_mem->resp.tmr_size;

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -598,7 +609,7 @@ static bool psp_skip_tmr(struct psp_context *psp)
static int psp_tmr_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.
	 * Already set up by host driver.
@@ -606,6 +617,8 @@ static int psp_tmr_load(struct psp_context *psp)
	if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_tmr_cmd_buf(psp, cmd, psp->tmr_mc_addr, psp->tmr_bo);
	DRM_INFO("reserve 0x%lx from 0x%llx for PSP TMR\n",
		 amdgpu_bo_size(psp->tmr_bo), psp->tmr_mc_addr);
@@ -613,14 +626,14 @@ static int psp_tmr_load(struct psp_context *psp)
	ret = psp_cmd_submit_buf(psp, NULL, cmd,
				 psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

static void psp_prep_tmr_unload_cmd_buf(struct psp_context *psp,
				        struct psp_gfx_cmd_resp *cmd)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	if (amdgpu_sriov_vf(psp->adev))
		cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR;
	else
@@ -630,7 +643,7 @@ static void psp_prep_tmr_unload_cmd_buf(struct psp_context *psp,
static int psp_tmr_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	psp_prep_tmr_unload_cmd_buf(psp, cmd);
	DRM_INFO("free PSP TMR buffer\n");
@@ -638,6 +651,8 @@ static int psp_tmr_unload(struct psp_context *psp)
	ret = psp_cmd_submit_buf(psp, NULL, cmd,
				 psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -662,9 +677,7 @@ int psp_get_fw_attestation_records_addr(struct psp_context *psp,
					uint64_t *output_ptr)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));
	struct psp_gfx_cmd_resp *cmd;

	if (!output_ptr)
		return -EINVAL;
@@ -672,6 +685,8 @@ int psp_get_fw_attestation_records_addr(struct psp_context *psp,
	if (amdgpu_sriov_vf(psp->adev))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	cmd->cmd_id = GFX_CMD_ID_GET_FW_ATTESTATION;

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
@@ -682,19 +697,21 @@ int psp_get_fw_attestation_records_addr(struct psp_context *psp,
			      ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_hi << 32);
	}

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_boot_config_get(struct amdgpu_device *adev, uint32_t *boot_cfg)
{
	struct psp_context *psp = &adev->psp;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;
	int ret;

	if (amdgpu_sriov_vf(adev))
		return 0;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));
	cmd = acquire_psp_cmd_buf(psp);

	cmd->cmd_id = GFX_CMD_ID_BOOT_CFG;
	cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_GET;
@@ -705,37 +722,45 @@ static int psp_boot_config_get(struct amdgpu_device *adev, uint32_t *boot_cfg)
			(cmd->resp.uresp.boot_cfg.boot_cfg & BOOT_CONFIG_GECC) ? 1 : 0;
	}

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_boot_config_set(struct amdgpu_device *adev, uint32_t boot_cfg)
{
	int ret;
	struct psp_context *psp = &adev->psp;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	if (amdgpu_sriov_vf(adev))
		return 0;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));
	cmd = acquire_psp_cmd_buf(psp);

	cmd->cmd_id = GFX_CMD_ID_BOOT_CFG;
	cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_SET;
	cmd->cmd.boot_cfg.boot_config = boot_cfg;
	cmd->cmd.boot_cfg.boot_config_valid = boot_cfg;

	return psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_rl_load(struct amdgpu_device *adev)
{
	int ret;
	struct psp_context *psp = &adev->psp;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));
	struct psp_gfx_cmd_resp *cmd;

	if (!is_psp_fw_valid(psp->rl))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	memset(psp->fw_pri_buf, 0, PSP_1_MEG);
	memcpy(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes);

@@ -745,14 +770,16 @@ static int psp_rl_load(struct amdgpu_device *adev)
	cmd->cmd.cmd_load_ip_fw.fw_size = psp->rl.size_bytes;
	cmd->cmd.cmd_load_ip_fw.fw_type = GFX_FW_TYPE_REG_LIST;

	return psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
				uint64_t asd_mc, uint32_t size)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id = GFX_CMD_ID_LOAD_ASD;
	cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(asd_mc);
	cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(asd_mc);
@@ -766,7 +793,7 @@ static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
static int psp_asd_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/* If PSP version doesn't match ASD version, asd loading will be failed.
	 * add workaround to bypass it for sriov now.
@@ -775,6 +802,8 @@ static int psp_asd_load(struct psp_context *psp)
	if (amdgpu_sriov_vf(psp->adev) || !psp->asd_ucode_size)
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_copy_fw(psp, psp->asd_start_addr, psp->asd_ucode_size);

	psp_prep_asd_load_cmd_buf(cmd, psp->fw_pri_mc_addr,
@@ -787,14 +816,14 @@ static int psp_asd_load(struct psp_context *psp)
		psp->asd_context.session_id = cmd->resp.session_id;
	}

	release_psp_cmd_buf(psp);

	return ret;
}

static void psp_prep_ta_unload_cmd_buf(struct psp_gfx_cmd_resp *cmd,
				       uint32_t session_id)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id = GFX_CMD_ID_UNLOAD_TA;
	cmd->cmd.cmd_unload_ta.session_id = session_id;
}
@@ -802,7 +831,7 @@ static void psp_prep_ta_unload_cmd_buf(struct psp_gfx_cmd_resp *cmd,
static int psp_asd_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	if (amdgpu_sriov_vf(psp->adev))
		return 0;
@@ -810,6 +839,8 @@ static int psp_asd_unload(struct psp_context *psp)
	if (!psp->asd_context.asd_initialized)
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->asd_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
@@ -817,14 +848,14 @@ static int psp_asd_unload(struct psp_context *psp)
	if (!ret)
		psp->asd_context.asd_initialized = false;

	release_psp_cmd_buf(psp);

	return ret;
}

static void psp_prep_reg_prog_cmd_buf(struct psp_gfx_cmd_resp *cmd,
		uint32_t id, uint32_t value)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id = GFX_CMD_ID_PROG_REG;
	cmd->cmd.cmd_setup_reg_prog.reg_value = value;
	cmd->cmd.cmd_setup_reg_prog.reg_id = id;
@@ -833,17 +864,21 @@ static void psp_prep_reg_prog_cmd_buf(struct psp_gfx_cmd_resp *cmd,
int psp_reg_program(struct psp_context *psp, enum psp_reg_prog_id reg,
		uint32_t value)
{
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;
	int ret = 0;

	if (reg >= PSP_REG_LAST)
		return -EINVAL;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_reg_prog_cmd_buf(cmd, reg, value);
	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
	if (ret)
		DRM_ERROR("PSP failed to program reg id %d", reg);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -853,8 +888,6 @@ static void psp_prep_ta_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
				     uint64_t ta_shared_mc,
				     uint32_t ta_shared_size)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id				= GFX_CMD_ID_LOAD_TA;
	cmd->cmd.cmd_load_ta.app_phy_addr_lo 	= lower_32_bits(ta_bin_mc);
	cmd->cmd.cmd_load_ta.app_phy_addr_hi	= upper_32_bits(ta_bin_mc);
@@ -886,8 +919,6 @@ static void psp_prep_ta_invoke_cmd_buf(struct psp_gfx_cmd_resp *cmd,
				       uint32_t ta_cmd_id,
				       uint32_t session_id)
{
	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id				= GFX_CMD_ID_INVOKE_CMD;
	cmd->cmd.cmd_invoke_cmd.session_id	= session_id;
	cmd->cmd.cmd_invoke_cmd.ta_cmd_id	= ta_cmd_id;
@@ -898,25 +929,29 @@ static int psp_ta_invoke(struct psp_context *psp,
		  uint32_t session_id)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_invoke_cmd_buf(cmd, ta_cmd_id, session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
				 psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_xgmi_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the loading in sriov for now
	 */

	cmd = acquire_psp_cmd_buf(psp);

	psp_copy_fw(psp, psp->ta_xgmi_start_addr, psp->ta_xgmi_ucode_size);

	psp_prep_ta_load_cmd_buf(cmd,
@@ -933,13 +968,15 @@ static int psp_xgmi_load(struct psp_context *psp)
		psp->xgmi_context.session_id = cmd->resp.session_id;
	}

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_xgmi_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;
	struct amdgpu_device *adev = psp->adev;

	/* XGMI TA unload currently is not supported on Arcturus/Aldebaran A+A */
@@ -951,11 +988,15 @@ static int psp_xgmi_unload(struct psp_context *psp)
	 * TODO: bypass the unloading in sriov for now
	 */

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->xgmi_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
				 psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1175,7 +1216,7 @@ static int psp_ras_init_shared_buf(struct psp_context *psp)
static int psp_ras_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;
	struct ta_ras_shared_memory *ras_cmd;

	/*
@@ -1193,6 +1234,8 @@ static int psp_ras_load(struct psp_context *psp)
	else
		ras_cmd->ras_in_message.init_flags.dgpu_mode = 1;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_load_cmd_buf(cmd,
				 psp->fw_pri_mc_addr,
				 psp->ta_ras_ucode_size,
@@ -1211,6 +1254,8 @@ static int psp_ras_load(struct psp_context *psp)
			dev_warn(psp->adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status);
	}

	release_psp_cmd_buf(psp);

	if (ret || ras_cmd->ras_status)
		amdgpu_ras_fini(psp->adev);

@@ -1220,7 +1265,7 @@ static int psp_ras_load(struct psp_context *psp)
static int psp_ras_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the unloading in sriov for now
@@ -1228,11 +1273,15 @@ static int psp_ras_unload(struct psp_context *psp)
	if (amdgpu_sriov_vf(psp->adev))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->ras.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
			psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1473,7 +1522,7 @@ static int psp_hdcp_init_shared_buf(struct psp_context *psp)
static int psp_hdcp_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the loading in sriov for now
@@ -1484,6 +1533,8 @@ static int psp_hdcp_load(struct psp_context *psp)
	psp_copy_fw(psp, psp->ta_hdcp_start_addr,
		    psp->ta_hdcp_ucode_size);

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_load_cmd_buf(cmd,
				 psp->fw_pri_mc_addr,
				 psp->ta_hdcp_ucode_size,
@@ -1498,6 +1549,8 @@ static int psp_hdcp_load(struct psp_context *psp)
		mutex_init(&psp->hdcp_context.mutex);
	}

	release_psp_cmd_buf(psp);

	return ret;
}
static int psp_hdcp_initialize(struct psp_context *psp)
@@ -1532,7 +1585,7 @@ static int psp_hdcp_initialize(struct psp_context *psp)
static int psp_hdcp_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the unloading in sriov for now
@@ -1540,10 +1593,14 @@ static int psp_hdcp_unload(struct psp_context *psp)
	if (amdgpu_sriov_vf(psp->adev))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->hdcp_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1612,7 +1669,7 @@ static int psp_dtm_init_shared_buf(struct psp_context *psp)
static int psp_dtm_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the loading in sriov for now
@@ -1622,6 +1679,8 @@ static int psp_dtm_load(struct psp_context *psp)

	psp_copy_fw(psp, psp->ta_dtm_start_addr, psp->ta_dtm_ucode_size);

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_load_cmd_buf(cmd,
				 psp->fw_pri_mc_addr,
				 psp->ta_dtm_ucode_size,
@@ -1636,6 +1695,8 @@ static int psp_dtm_load(struct psp_context *psp)
		mutex_init(&psp->dtm_context.mutex);
	}

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1671,7 +1732,7 @@ static int psp_dtm_initialize(struct psp_context *psp)
static int psp_dtm_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	/*
	 * TODO: bypass the unloading in sriov for now
@@ -1679,10 +1740,14 @@ static int psp_dtm_unload(struct psp_context *psp)
	if (amdgpu_sriov_vf(psp->adev))
		return 0;

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->dtm_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1751,10 +1816,12 @@ static int psp_rap_init_shared_buf(struct psp_context *psp)
static int psp_rap_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd;

	psp_copy_fw(psp, psp->ta_rap_start_addr, psp->ta_rap_ucode_size);

	cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_load_cmd_buf(cmd,
				 psp->fw_pri_mc_addr,
				 psp->ta_rap_ucode_size,
@@ -1769,18 +1836,22 @@ static int psp_rap_load(struct psp_context *psp)
		mutex_init(&psp->rap_context.mutex);
	}

	release_psp_cmd_buf(psp);

	return ret;
}

static int psp_rap_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->rap_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -1905,7 +1976,7 @@ static int psp_securedisplay_init_shared_buf(struct psp_context *psp)
static int psp_securedisplay_load(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	memset(psp->fw_pri_buf, 0, PSP_1_MEG);
	memcpy(psp->fw_pri_buf, psp->ta_securedisplay_start_addr, psp->ta_securedisplay_ucode_size);
@@ -1918,26 +1989,28 @@ static int psp_securedisplay_load(struct psp_context *psp)

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	if (ret)
		goto failed;

	if (!ret) {
		psp->securedisplay_context.securedisplay_initialized = true;
		psp->securedisplay_context.session_id = cmd->resp.session_id;
		mutex_init(&psp->securedisplay_context.mutex);
	}

	release_psp_cmd_buf(psp);

failed:
	return ret;
}

static int psp_securedisplay_unload(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	psp_prep_ta_unload_cmd_buf(cmd, psp->securedisplay_context.session_id);

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}

@@ -2312,8 +2385,6 @@ static int psp_prep_load_ip_fw_cmd_buf(struct amdgpu_firmware_info *ucode,
	int ret;
	uint64_t fw_mem_mc_addr = ucode->mc_addr;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));

	cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW;
	cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(fw_mem_mc_addr);
	cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(fw_mem_mc_addr);
@@ -2330,13 +2401,15 @@ static int psp_execute_non_psp_fw_load(struct psp_context *psp,
			          struct amdgpu_firmware_info *ucode)
{
	int ret = 0;
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	ret = psp_prep_load_ip_fw_cmd_buf(ucode, psp->cmd);
	if (ret)
		return ret;

	ret = psp_cmd_submit_buf(psp, ucode, psp->cmd,
	ret = psp_prep_load_ip_fw_cmd_buf(ucode, cmd);
	if (!ret) {
		ret = psp_cmd_submit_buf(psp, ucode, cmd,
					 psp->fence_buf_mc_addr);
	}

	release_psp_cmd_buf(psp);

	return ret;
}
@@ -2807,15 +2880,15 @@ int psp_gpu_reset(struct amdgpu_device *adev)
int psp_rlc_autoload_start(struct psp_context *psp)
{
	int ret;
	struct psp_gfx_cmd_resp *cmd = psp->cmd;

	memset(cmd, 0, sizeof(struct psp_gfx_cmd_resp));
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	cmd->cmd_id = GFX_CMD_ID_AUTOLOAD_RLC;

	ret = psp_cmd_submit_buf(psp, NULL, cmd,
				 psp->fence_buf_mc_addr);

	release_psp_cmd_buf(psp);

	return ret;
}