Commit 4af191d6 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'pm-cpufreq' and 'pm-cpuidle' 

Merge cpufreq and cpuidle updates for 6.5-rc1:

 - Prevent cpufreq drivers that provide the ->adjust_perf() callback
   without a ->fast_switch() one which is used as a fallback from the
   former in some cases (Wyes Karny).

 - Fix some issues related to the AMD P-state cpufreq driver (Mario
   Limonciello, Wyes Karny).

 - Fix the energy_performance_preference attribute handling in the
   intel_pstate driver in passive mode (Tero Kristo).

 - Clean up the intel_idle driver, make it work with VM guests that
   cannot use the MWAIT instruction and address the case in which the
   host may enter a deep idle state when the guest is idle (Arjan van
   de Ven).

* pm-cpufreq:
  cpufreq: intel_pstate: Fix energy_performance_preference for passive
  cpufreq: amd-pstate: Add a kernel config option to set default mode
  cpufreq: amd-pstate: Set a fallback policy based on preferred_profile
  ACPI: CPPC: Add definition for undefined FADT preferred PM profile value
  cpufreq: amd-pstate: Set default governor to schedutil
  cpufreq: amd-pstate: Make amd-pstate EPP driver name hyphenated
  cpufreq: amd-pstate: Write CPPC enable bit per-socket
  cpufreq: Fail driver register if it has adjust_perf without fast_switch

* pm-cpuidle:
  intel_idle: Add a "Long HLT" C1 state for the VM guest mode
  intel_idle: Add support for using intel_idle in a VM guest using just hlt
  intel_idle: clean up the (new) state_update_enter_method function
  intel_idle: refactor state->enter manipulation into its own function
parents 5d83a2b1 03f44ffb 0fac214b

drivers/cpufreq/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ choice 
	prompt "Default CPUFreq governor"

	default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1110_CPUFREQ

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if (X86_INTEL_PSTATE || X86_AMD_PSTATE) && SMP

	default CPU_FREQ_DEFAULT_GOV_PERFORMANCE

	help

	  This option sets which CPUFreq governor shall be loaded at

drivers/cpufreq/Kconfig.x86

+17 −0
Original line number Diff line number Diff line
@@ -51,6 +51,23 @@ config X86_AMD_PSTATE 


	  If in doubt, say N.



config X86_AMD_PSTATE_DEFAULT_MODE

	int "AMD Processor P-State default mode"

	depends on X86_AMD_PSTATE

	default 3 if X86_AMD_PSTATE

	range 1 4

	help

	  Select the default mode the amd-pstate driver will use on

	  supported hardware.

	  The value set has the following meanings:

		1 -> Disabled

		2 -> Passive

		3 -> Active (EPP)

		4 -> Guided



	  For details, take a look at:

	  <file:Documentation/admin-guide/pm/amd-pstate.rst>.



config X86_AMD_PSTATE_UT

	tristate "selftest for AMD Processor P-State driver"

	depends on X86 && ACPI_PROCESSOR

drivers/cpufreq/amd-pstate.c

+102 −29
Original line number Diff line number Diff line
@@ -62,7 +62,8 @@ 
static struct cpufreq_driver *current_pstate_driver;

static struct cpufreq_driver amd_pstate_driver;

static struct cpufreq_driver amd_pstate_epp_driver;

static int cppc_state = AMD_PSTATE_DISABLE;

static int cppc_state = AMD_PSTATE_UNDEFINED;

static bool cppc_enabled;



/*

 * AMD Energy Preference Performance (EPP)
@@ -228,7 +229,28 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata, 


static inline int pstate_enable(bool enable)

{

	return wrmsrl_safe(MSR_AMD_CPPC_ENABLE, enable);

	int ret, cpu;

	unsigned long logical_proc_id_mask = 0;



	if (enable == cppc_enabled)

		return 0;



	for_each_present_cpu(cpu) {

		unsigned long logical_id = topology_logical_die_id(cpu);



		if (test_bit(logical_id, &logical_proc_id_mask))

			continue;



		set_bit(logical_id, &logical_proc_id_mask);



		ret = wrmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_ENABLE,

				enable);

		if (ret)

			return ret;

	}



	cppc_enabled = enable;

	return 0;

}



static int cppc_enable(bool enable)
@@ -236,6 +258,9 @@ static int cppc_enable(bool enable) 
	int cpu, ret = 0;

	struct cppc_perf_ctrls perf_ctrls;



	if (enable == cppc_enabled)

		return 0;



	for_each_present_cpu(cpu) {

		ret = cppc_set_enable(cpu, enable);

		if (ret)
@@ -251,6 +276,7 @@ static int cppc_enable(bool enable) 
		}

	}



	cppc_enabled = enable;

	return ret;

}
@@ -1045,6 +1071,26 @@ static const struct attribute_group amd_pstate_global_attr_group = { 
	.attrs = pstate_global_attributes,

};



static bool amd_pstate_acpi_pm_profile_server(void)

{

	switch (acpi_gbl_FADT.preferred_profile) {

	case PM_ENTERPRISE_SERVER:

	case PM_SOHO_SERVER:

	case PM_PERFORMANCE_SERVER:

		return true;

	}

	return false;

}



static bool amd_pstate_acpi_pm_profile_undefined(void)

{

	if (acpi_gbl_FADT.preferred_profile == PM_UNSPECIFIED)

		return true;

	if (acpi_gbl_FADT.preferred_profile >= NR_PM_PROFILES)

		return true;

	return false;

}



static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)

{

	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
@@ -1102,9 +1148,13 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) 
	policy->max = policy->cpuinfo.max_freq;



	/*

	 * Set the policy to powersave to provide a valid fallback value in case

	 * Set the policy to provide a valid fallback value in case

	 * the default cpufreq governor is neither powersave nor performance.

	 */

	if (amd_pstate_acpi_pm_profile_server() ||

	    amd_pstate_acpi_pm_profile_undefined())

		policy->policy = CPUFREQ_POLICY_PERFORMANCE;

	else

		policy->policy = CPUFREQ_POLICY_POWERSAVE;



	if (boot_cpu_has(X86_FEATURE_CPPC)) {
@@ -1356,10 +1406,29 @@ static struct cpufreq_driver amd_pstate_epp_driver = { 
	.online		= amd_pstate_epp_cpu_online,

	.suspend	= amd_pstate_epp_suspend,

	.resume		= amd_pstate_epp_resume,

	.name		= "amd_pstate_epp",

	.name		= "amd-pstate-epp",

	.attr		= amd_pstate_epp_attr,

};



static int __init amd_pstate_set_driver(int mode_idx)

{

	if (mode_idx >= AMD_PSTATE_DISABLE && mode_idx < AMD_PSTATE_MAX) {

		cppc_state = mode_idx;

		if (cppc_state == AMD_PSTATE_DISABLE)

			pr_info("driver is explicitly disabled\n");



		if (cppc_state == AMD_PSTATE_ACTIVE)

			current_pstate_driver = &amd_pstate_epp_driver;



		if (cppc_state == AMD_PSTATE_PASSIVE || cppc_state == AMD_PSTATE_GUIDED)

			current_pstate_driver = &amd_pstate_driver;



		return 0;

	}



	return -EINVAL;

}



static int __init amd_pstate_init(void)

{

	struct device *dev_root;
@@ -1367,15 +1436,6 @@ static int __init amd_pstate_init(void) 


	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)

		return -ENODEV;

	/*

	 * by default the pstate driver is disabled to load

	 * enable the amd_pstate passive mode driver explicitly

	 * with amd_pstate=passive or other modes in kernel command line

	 */

	if (cppc_state == AMD_PSTATE_DISABLE) {

		pr_info("driver load is disabled, boot with specific mode to enable this\n");

		return -ENODEV;

	}



	if (!acpi_cpc_valid()) {

		pr_warn_once("the _CPC object is not present in SBIOS or ACPI disabled\n");
@@ -1386,6 +1446,33 @@ static int __init amd_pstate_init(void) 
	if (cpufreq_get_current_driver())

		return -EEXIST;



	switch (cppc_state) {

	case AMD_PSTATE_UNDEFINED:

		/* Disable on the following configs by default:

		 * 1. Undefined platforms

		 * 2. Server platforms

		 * 3. Shared memory designs

		 */

		if (amd_pstate_acpi_pm_profile_undefined() ||

		    amd_pstate_acpi_pm_profile_server() ||

		    !boot_cpu_has(X86_FEATURE_CPPC)) {

			pr_info("driver load is disabled, boot with specific mode to enable this\n");

			return -ENODEV;

		}

		ret = amd_pstate_set_driver(CONFIG_X86_AMD_PSTATE_DEFAULT_MODE);

		if (ret)

			return ret;

		break;

	case AMD_PSTATE_DISABLE:

		return -ENODEV;

	case AMD_PSTATE_PASSIVE:

	case AMD_PSTATE_ACTIVE:

	case AMD_PSTATE_GUIDED:

		break;

	default:

		return -EINVAL;

	}



	/* capability check */

	if (boot_cpu_has(X86_FEATURE_CPPC)) {

		pr_debug("AMD CPPC MSR based functionality is supported\n");
@@ -1438,21 +1525,7 @@ static int __init amd_pstate_param(char *str) 
	size = strlen(str);

	mode_idx = get_mode_idx_from_str(str, size);



	if (mode_idx >= AMD_PSTATE_DISABLE && mode_idx < AMD_PSTATE_MAX) {

		cppc_state = mode_idx;

		if (cppc_state == AMD_PSTATE_DISABLE)

			pr_info("driver is explicitly disabled\n");



		if (cppc_state == AMD_PSTATE_ACTIVE)

			current_pstate_driver = &amd_pstate_epp_driver;



		if (cppc_state == AMD_PSTATE_PASSIVE || cppc_state == AMD_PSTATE_GUIDED)

			current_pstate_driver = &amd_pstate_driver;



		return 0;

	}



	return -EINVAL;

	return amd_pstate_set_driver(mode_idx);

}

early_param("amd_pstate", amd_pstate_param);

drivers/cpufreq/cpufreq.c

+2 −1
Original line number Diff line number Diff line
@@ -2828,7 +2828,8 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data) 
	     (driver_data->setpolicy && (driver_data->target_index ||

		    driver_data->target)) ||

	     (!driver_data->get_intermediate != !driver_data->target_intermediate) ||

	     (!driver_data->online != !driver_data->offline))

	     (!driver_data->online != !driver_data->offline) ||

		 (driver_data->adjust_perf && !driver_data->fast_switch))

		return -EINVAL;



	pr_debug("trying to register driver %s\n", driver_data->name);

drivers/cpufreq/intel_pstate.c

+2 −0
Original line number Diff line number Diff line
@@ -824,6 +824,8 @@ static ssize_t store_energy_performance_preference( 
			err = cpufreq_start_governor(policy);

			if (!ret)

				ret = err;

		} else {

			ret = 0;

		}

	}