Commit 4ae9f874 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2022-09-30' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for v6.1:

Core Changes:
- Add dma_resv_assert_held to vmap/vunmap calls.
- Add kunit tests for some format conversion calls.
- Don't rewrite link config when setting phy test pattern in
  DP link training.

Driver Changes:
- Assorted small fixes in bridge/lt8192b, qxl, virtio-gpu, ast.
- Fix corrupted image output in lt8912b.
- Fix driver unbind in meson.
- Add INX, BOE, AUO, Multi-Inno Technology panels to panel-edp.
- Synchronize access to GEM bo's in simpledrm, ssd130x.
- Use dev_err_probe in panel-edp and panel-simple.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/afbd505a-3799-c73b-8008-ef6e156ad7e1@linux.intel.com
parents 7860d720 c9b48b91

Documentation/devicetree/bindings/display/panel/panel-simple.yaml

+2 −0
Original line number Diff line number Diff line
@@ -234,6 +234,8 @@ properties: 
      - mitsubishi,aa070mc01-ca1

        # Multi-Inno Technology Co.,Ltd MI0700S4T-6 7" 800x480 TFT Resistive Touch Module

      - multi-inno,mi0700s4t-6

        # Multi-Inno Technology Co.,Ltd MI0800FT-9 8" 800x600 TFT Resistive Touch Module

      - multi-inno,mi0800ft-9

        # Multi-Inno Technology Co.,Ltd MI1010AIT-1CP 10.1" 1280x800 LVDS IPS Cap Touch Mod.

      - multi-inno,mi1010ait-1cp

        # NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel

drivers/gpu/drm/ast/ast_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 


#include "ast_drv.h"



int ast_modeset = -1;

static int ast_modeset = -1;



MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");

module_param_named(modeset, ast_modeset, int, 0400);

drivers/gpu/drm/bridge/lontium-lt8912b.c

+28 −11
Original line number Diff line number Diff line
@@ -165,30 +165,38 @@ static int lt8912_write_rxlogicres_config(struct lt8912 *lt) 
	return ret;

};



/* enable LVDS output with some hardcoded configuration, not required for the HDMI output */

static int lt8912_write_lvds_config(struct lt8912 *lt)

{

	const struct reg_sequence seq[] = {

		// lvds power up

		{0x44, 0x30},

		{0x51, 0x05},

		{0x50, 0x24},

		{0x51, 0x2d},

		{0x52, 0x04},

		{0x69, 0x0e},



		// core pll bypass

		{0x50, 0x24}, // cp=50uA

		{0x51, 0x2d}, // Pix_clk as reference, second order passive LPF PLL

		{0x52, 0x04}, // loopdiv=0, use second-order PLL

		{0x69, 0x0e}, // CP_PRESET_DIV_RATIO

		{0x69, 0x8e},

		{0x6a, 0x00},

		{0x6c, 0xb8},

		{0x6c, 0xb8}, // RGD_CP_SOFT_K_EN,RGD_CP_SOFT_K[13:8]

		{0x6b, 0x51},

		{0x04, 0xfb},



		{0x04, 0xfb}, // core pll reset

		{0x04, 0xff},

		{0x7f, 0x00},

		{0xa8, 0x13},

		{0x02, 0xf7},



		// scaler bypass

		{0x7f, 0x00}, // disable scaler

		{0xa8, 0x13}, // 0x13: JEIDA, 0x33: VESA



		{0x02, 0xf7}, // lvds pll reset

		{0x02, 0xff},

		{0x03, 0xcf},

		{0x03, 0xff},

	};



	return regmap_multi_reg_write(lt->regmap[I2C_CEC_DSI], seq, ARRAY_SIZE(seq));

	return regmap_multi_reg_write(lt->regmap[I2C_MAIN], seq, ARRAY_SIZE(seq));

};



static inline struct lt8912 *bridge_to_lt8912(struct drm_bridge *b)
@@ -268,7 +276,7 @@ static int lt8912_video_setup(struct lt8912 *lt) 
	u32 hactive, h_total, hpw, hfp, hbp;

	u32 vactive, v_total, vpw, vfp, vbp;

	u8 settle = 0x08;

	int ret;

	int ret, hsync_activehigh, vsync_activehigh;



	if (!lt)

		return -EINVAL;
@@ -278,12 +286,14 @@ static int lt8912_video_setup(struct lt8912 *lt) 
	hpw = lt->mode.hsync_len;

	hbp = lt->mode.hback_porch;

	h_total = hactive + hfp + hpw + hbp;

	hsync_activehigh = lt->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH;



	vactive = lt->mode.vactive;

	vfp = lt->mode.vfront_porch;

	vpw = lt->mode.vsync_len;

	vbp = lt->mode.vback_porch;

	v_total = vactive + vfp + vpw + vbp;

	vsync_activehigh = lt->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH;



	if (vactive <= 600)

		settle = 0x04;
@@ -317,6 +327,13 @@ static int lt8912_video_setup(struct lt8912 *lt) 
	ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x3e, hfp & 0xff);

	ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x3f, hfp >> 8);



	ret |= regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(0),

				  vsync_activehigh ? BIT(0) : 0);

	ret |= regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(1),

				  hsync_activehigh ? BIT(1) : 0);

	ret |= regmap_update_bits(lt->regmap[I2C_MAIN], 0xb2, BIT(0),

				  lt->connector.display_info.is_hdmi ? BIT(0) : 0);



	return ret;

}

drivers/gpu/drm/display/drm_dp_helper.c

+0 −9
Original line number Diff line number Diff line
@@ -2670,17 +2670,8 @@ int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux, 
				struct drm_dp_phy_test_params *data, u8 dp_rev)

{

	int err, i;

	u8 link_config[2];

	u8 test_pattern;



	link_config[0] = drm_dp_link_rate_to_bw_code(data->link_rate);

	link_config[1] = data->num_lanes;

	if (data->enhanced_frame_cap)

		link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;

	err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, link_config, 2);

	if (err < 0)

		return err;



	test_pattern = data->phy_pattern;

	if (dp_rev < 0x12) {

		test_pattern = (test_pattern << 2) &

drivers/gpu/drm/drm_format_helper.c

+1 −0
Original line number Diff line number Diff line
@@ -553,6 +553,7 @@ void drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *d 
	drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false,

		    drm_fb_xrgb8888_to_xrgb2101010_line);

}

EXPORT_SYMBOL(drm_fb_xrgb8888_to_xrgb2101010);



static void drm_fb_xrgb8888_to_gray8_line(void *dbuf, const void *sbuf, unsigned int pixels)

{